TY - GEN
T1 - Interference from power/signal lines and to SRAM circuits in 65nm CMOS inductive-coupling link
AU - Niitsu, Kiichi
AU - Sugimori, Yasufumi
AU - Kohama, Yoshinori
AU - Osada, Kenichi
AU - Irie, Naohiko
AU - Ishikuro, Hiroki
AU - Kuroda, Tadahiro
PY - 2007/12/1
Y1 - 2007/12/1
N2 - This paper discusses interference of an inductive-coupling link in 65nm CMOS. Electromagnetic interference from power/signal lines and to SRAM was simulated and measured. Interference from power lines for mobile applications (line and space) is smaller than that for high-performance applications (mesh type). Interference from signal lines requires only 9% of additional transmit power even in the worst case of logic circuits. In typical operation range, interference to SRAM is ignorable. Only when supply voltage is much lower than typical range, the bit-line noise from the inductive-coupling link influences SRAM operation. Interference to SRAM is small compared with other influences such as device variations and soft errors.
AB - This paper discusses interference of an inductive-coupling link in 65nm CMOS. Electromagnetic interference from power/signal lines and to SRAM was simulated and measured. Interference from power lines for mobile applications (line and space) is smaller than that for high-performance applications (mesh type). Interference from signal lines requires only 9% of additional transmit power even in the worst case of logic circuits. In typical operation range, interference to SRAM is ignorable. Only when supply voltage is much lower than typical range, the bit-line noise from the inductive-coupling link influences SRAM operation. Interference to SRAM is small compared with other influences such as device variations and soft errors.
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U2 - 10.1109/ASSCC.2007.4425749
DO - 10.1109/ASSCC.2007.4425749
M3 - Conference contribution
AN - SCOPUS:51349146657
SN - 1424413605
SN - 9781424413607
T3 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
SP - 131
EP - 134
BT - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
T2 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Y2 - 12 November 2007 through 14 November 2007
ER -