Interlace coding system involving error correcting code and data compaction code

Takaya Yamazato, Iwao Sasase, Shinsaku Mori

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An interlace coding system that uses an error correcting code and a data compaction code is proposed. In this coding system, error correcting redundancy is added to the block lists of the source model (in which a data compaction system construct is used to reduce source redundancy). The performance of this system is analyzed for various sizes of source data. Better source data recoverability than a conventional two-stage coding system using data compaction first and then adding the error-correcting coding was demonstrated.

Original languageEnglish
Title of host publicationIEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings
Editors Anon
PublisherPubl by IEEE
Pages196-199
Number of pages4
ISBN (Print)0879426381
Publication statusPublished - 1991 Dec 1
EventProceedings of the 1991 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Processing. Conference Proceedings - Victoria, BC, USA
Duration: 1991 May 91991 May 10

Publication series

NameIEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings

Other

OtherProceedings of the 1991 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Processing. Conference Proceedings
CityVictoria, BC, USA
Period91/5/991/5/10

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ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

Cite this

Yamazato, T., Sasase, I., & Mori, S. (1991). Interlace coding system involving error correcting code and data compaction code. In Anon (Ed.), IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings (pp. 196-199). (IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings). Publ by IEEE.