Internal parallelization of data-driven virtual hardware

Yuichiro Shibata, Xiao Ping Ling, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations.

Original languageEnglish
Title of host publicationProceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages366-371
Number of pages6
Volume1999-September
ISBN (Electronic)0769503535
DOIs
Publication statusPublished - 1999 Jan 1
Event1999 lnternational Workshops on Parallel Processing, ICPP 1999 - Aizu-Wakamatsu, Japan
Duration: 1999 Sep 24 → …

Other

Other1999 lnternational Workshops on Parallel Processing, ICPP 1999
CountryJapan
CityAizu-Wakamatsu
Period99/9/24 → …

Fingerprint

Data-driven
Parallelization
Field Programmable Gate Array
Field programmable gate arrays (FPGA)
Hardware
Internal
Configuration
Dynamic random access storage
Random access storage
Data Flow
Parallelism
Replacement
Chip
Eliminate
Simulation
Context
Architecture

ASJC Scopus subject areas

  • Software
  • Mathematics(all)
  • Hardware and Architecture

Cite this

Shibata, Y., Ling, X. P., & Amano, H. (1999). Internal parallelization of data-driven virtual hardware. In Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999 (Vol. 1999-September, pp. 366-371). [800087] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICPPW.1999.800087

Internal parallelization of data-driven virtual hardware. / Shibata, Yuichiro; Ling, Xiao Ping; Amano, Hideharu.

Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. Vol. 1999-September Institute of Electrical and Electronics Engineers Inc., 1999. p. 366-371 800087.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Shibata, Y, Ling, XP & Amano, H 1999, Internal parallelization of data-driven virtual hardware. in Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. vol. 1999-September, 800087, Institute of Electrical and Electronics Engineers Inc., pp. 366-371, 1999 lnternational Workshops on Parallel Processing, ICPP 1999, Aizu-Wakamatsu, Japan, 99/9/24. https://doi.org/10.1109/ICPPW.1999.800087
Shibata Y, Ling XP, Amano H. Internal parallelization of data-driven virtual hardware. In Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. Vol. 1999-September. Institute of Electrical and Electronics Engineers Inc. 1999. p. 366-371. 800087 https://doi.org/10.1109/ICPPW.1999.800087
Shibata, Yuichiro ; Ling, Xiao Ping ; Amano, Hideharu. / Internal parallelization of data-driven virtual hardware. Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. Vol. 1999-September Institute of Electrical and Electronics Engineers Inc., 1999. pp. 366-371
@inproceedings{b310b3641d424094b1b8bd04cd9df0d7,
title = "Internal parallelization of data-driven virtual hardware",
abstract = "WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations.",
author = "Yuichiro Shibata and Ling, {Xiao Ping} and Hideharu Amano",
year = "1999",
month = "1",
day = "1",
doi = "10.1109/ICPPW.1999.800087",
language = "English",
volume = "1999-September",
pages = "366--371",
booktitle = "Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Internal parallelization of data-driven virtual hardware

AU - Shibata, Yuichiro

AU - Ling, Xiao Ping

AU - Amano, Hideharu

PY - 1999/1/1

Y1 - 1999/1/1

N2 - WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations.

AB - WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations.

UR - http://www.scopus.com/inward/record.url?scp=85038571993&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85038571993&partnerID=8YFLogxK

U2 - 10.1109/ICPPW.1999.800087

DO - 10.1109/ICPPW.1999.800087

M3 - Conference contribution

AN - SCOPUS:85038571993

VL - 1999-September

SP - 366

EP - 371

BT - Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999

PB - Institute of Electrical and Electronics Engineers Inc.

ER -