Key-value Store Chip Design for Low Power Consumption

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Low-power embedded systems often require simple but flexible functionality for data management. Key-value store is one of data stores, which provides simple API and is easy to scale-out. We developed a dedicated key-value store core as a low-power embedded storage. In this paper, key-value store chip is fabricated with Renesas SOTB 65-nm process technology. We evalute the real chip in terms of power consumption and operating frequency by tuning VDD and body bias voltage. The chip achieved 11.2mW as power consumption with 0.7V VDD if the target frequency is 40MHz. When data rate is low, the system can reduce power consumption by tuning VDD and body bias voltage.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728117485
DOIs
Publication statusPublished - 2019 May 23
Event22nd IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Yokohama, Japan
Duration: 2019 Apr 172019 Apr 19

Publication series

NameIEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings

Conference

Conference22nd IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019
CountryJapan
CityYokohama
Period19/4/1719/4/19

Fingerprint

Electric power utilization
Bias voltage
Tuning
Application programming interfaces (API)
Embedded systems
Information management

Keywords

  • Body Bias
  • Embedded System
  • Low-power
  • value Store

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Tokusashi, Y., Matsutani, H., & Amano, H. (2019). Key-value Store Chip Design for Low Power Consumption. In IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings [8721352] (IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CoolChips.2019.8721352

Key-value Store Chip Design for Low Power Consumption. / Tokusashi, Yuta; Matsutani, Hiroki; Amano, Hideharu.

IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8721352 (IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tokusashi, Y, Matsutani, H & Amano, H 2019, Key-value Store Chip Design for Low Power Consumption. in IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings., 8721352, IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 22nd IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019, Yokohama, Japan, 19/4/17. https://doi.org/10.1109/CoolChips.2019.8721352
Tokusashi Y, Matsutani H, Amano H. Key-value Store Chip Design for Low Power Consumption. In IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. 8721352. (IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings). https://doi.org/10.1109/CoolChips.2019.8721352
Tokusashi, Yuta ; Matsutani, Hiroki ; Amano, Hideharu. / Key-value Store Chip Design for Low Power Consumption. IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. (IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings).
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