TY - GEN
T1 - Key-value Store Chip Design for Low Power Consumption
AU - Tokusashi, Yuta
AU - Matsutani, Hiroki
AU - Amano, Hideharu
N1 - Funding Information:
Acknowledgment This work was supported by JSPS KAKENHI S Grant Number 25220002. The device model of SOTB in this study has been provided by VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Renesas Electronics Corp. The authors also thank Synopsys Inc. for the EDA tools support.
Publisher Copyright:
© 2019 IEEE.
PY - 2019/5/23
Y1 - 2019/5/23
N2 - Low-power embedded systems often require simple but flexible functionality for data management. Key-value store is one of data stores, which provides simple API and is easy to scale-out. We developed a dedicated key-value store core as a low-power embedded storage. In this paper, key-value store chip is fabricated with Renesas SOTB 65-nm process technology. We evalute the real chip in terms of power consumption and operating frequency by tuning VDD and body bias voltage. The chip achieved 11.2mW as power consumption with 0.7V VDD if the target frequency is 40MHz. When data rate is low, the system can reduce power consumption by tuning VDD and body bias voltage.
AB - Low-power embedded systems often require simple but flexible functionality for data management. Key-value store is one of data stores, which provides simple API and is easy to scale-out. We developed a dedicated key-value store core as a low-power embedded storage. In this paper, key-value store chip is fabricated with Renesas SOTB 65-nm process technology. We evalute the real chip in terms of power consumption and operating frequency by tuning VDD and body bias voltage. The chip achieved 11.2mW as power consumption with 0.7V VDD if the target frequency is 40MHz. When data rate is low, the system can reduce power consumption by tuning VDD and body bias voltage.
KW - Body Bias
KW - Embedded System
KW - Low-power
KW - value Store
UR - http://www.scopus.com/inward/record.url?scp=85067093383&partnerID=8YFLogxK
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U2 - 10.1109/CoolChips.2019.8721352
DO - 10.1109/CoolChips.2019.8721352
M3 - Conference contribution
AN - SCOPUS:85067093383
T3 - IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings
BT - IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019
Y2 - 17 April 2019 through 19 April 2019
ER -