Layered I/O architecture in a multicomputer type DSP system for video communications

Naoya Sakurai, Tetsurou Fujii, Naohisa Ohta

Research output: Contribution to journalConference article

Abstract

A layered I/O architecture in a multicomputer-type DSP system is described that achieves efficient load balancing and high-speed video data distribution/gathering for real-time video processing. The layered structure is based on global distribution using buses and local distribution serial links. In addition to multiple homogeneous processing elements, the concept of bus nodes with high data distribution rates is introduced. System performance is evaluated by computer simulation focusing on load balancing efficiency using a typical video processing algorithm. It is shown that load balancing, which combines task assignment control with large-grain data flow, can provide high performance.

Original languageEnglish
Pages (from-to)242-245
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
Publication statusPublished - 1989 Dec 1
EventIEEE International Symposium on Circuits and Systems 1989, the 22nd ISCAS. Part 1 - Portland, OR, USA
Duration: 1989 May 81989 May 11

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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