Abstract
This paper proposes a level-shifter free (LSF) approach for multi-VDD design to employ a combination of body bias control and a superior threshold-voltage (Vt) modulation capability of SOTB (Silicon on Thin BOX) devices. We applied this approach to a microprocessor test chip with low-voltage (VDDL) and high-voltage (VDDH) domains, and fabricated it in a 65nm SOTB technology. Measurement results demonstrated that the chip correctly operates at VDDL=0.6V and VDDH=1.2V under the reverse-body-bias (RBB) of 2V for pMOS transistors in the VDDH domain while suppressing the static dc current.
Original language | English |
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Title of host publication | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1-3 |
Number of pages | 3 |
Volume | 2018-March |
ISBN (Electronic) | 9781538637654 |
DOIs | |
Publication status | Published - 2018 Mar 7 |
Event | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States Duration: 2017 Oct 16 → 2017 Oct 18 |
Other
Other | 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 |
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Country | United States |
City | Burlingame |
Period | 17/10/16 → 17/10/18 |
Keywords
- body bias control
- level shifter
- multi-VDD
- SOTB
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering