Low power CMOS digital design for multimedia processors

T. Kuroda

doi:10.1109/ICVC.1999.820930

Low power CMOS digital design for multimedia processors

T. Kuroda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

9 Citations (Scopus)

Abstract

Low-power, high-speed CMOS circuit design by means of supply-voltage (V_DD) and threshold-voltage (V_TH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower V_DD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control V_DD and V_TH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

Original language	English
Title of host publication	ICVC 1999 - 6th International Conference on VLSI and CAD
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	359-367
Number of pages	9
ISBN (Print)	0780357272, 9780780357273
DOIs	https://doi.org/10.1109/ICVC.1999.820930
Publication status	Published - 1999 Jan 1
Externally published	Yes
Event	6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of Duration: 1999 Oct 26 → 1999 Oct 27

Publication series

Name	ICVC 1999 - 6th International Conference on VLSI and CAD

Other

Other	6th International Conference on VLSI and CAD, ICVC 1999
Country/Territory	Korea, Republic of
City	Seoul
Period	99/10/26 → 99/10/27

ASJC Scopus subject areas

Computer Graphics and Computer-Aided Design
Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/ICVC.1999.820930

Cite this

Kuroda, T 1999, Low power CMOS digital design for multimedia processors. in ICVC 1999 - 6th International Conference on VLSI and CAD., 820930, ICVC 1999 - 6th International Conference on VLSI and CAD, Institute of Electrical and Electronics Engineers Inc., pp. 359-367, 6th International Conference on VLSI and CAD, ICVC 1999, Seoul, Korea, Republic of, 99/10/26. https://doi.org/10.1109/ICVC.1999.820930

@inproceedings{3cd8414508e54b2e93e8089f43075c08,

title = "Low power CMOS digital design for multimedia processors",

abstract = "Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.",

author = "T. Kuroda",

year = "1999",

month = jan,

day = "1",

doi = "10.1109/ICVC.1999.820930",

language = "English",

isbn = "0780357272",

series = "ICVC 1999 - 6th International Conference on VLSI and CAD",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "359--367",

booktitle = "ICVC 1999 - 6th International Conference on VLSI and CAD",

note = "6th International Conference on VLSI and CAD, ICVC 1999 ; Conference date: 26-10-1999 Through 27-10-1999",

}

TY - GEN

T1 - Low power CMOS digital design for multimedia processors

AU - Kuroda, T.

PY - 1999/1/1

Y1 - 1999/1/1

N2 - Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

AB - Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

UR - http://www.scopus.com/inward/record.url?scp=37849015883&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=37849015883&partnerID=8YFLogxK

U2 - 10.1109/ICVC.1999.820930

DO - 10.1109/ICVC.1999.820930

M3 - Conference contribution

AN - SCOPUS:37849015883

SN - 0780357272

SN - 9780780357273

T3 - ICVC 1999 - 6th International Conference on VLSI and CAD

SP - 359

EP - 367

BT - ICVC 1999 - 6th International Conference on VLSI and CAD

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 6th International Conference on VLSI and CAD, ICVC 1999

Y2 - 26 October 1999 through 27 October 1999

ER -

Low power CMOS digital design for multimedia processors

Abstract

Publication series

Other

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this