Abstract
Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.
| Original language | English |
|---|---|
| Title of host publication | ICVC 1999 - 6th International Conference on VLSI and CAD |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 359-367 |
| Number of pages | 9 |
| ISBN (Print) | 0780357272, 9780780357273 |
| DOIs | |
| Publication status | Published - 1999 Jan 1 |
| Externally published | Yes |
| Event | 6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of Duration: 1999 Oct 26 → 1999 Oct 27 |
Other
| Other | 6th International Conference on VLSI and CAD, ICVC 1999 |
|---|---|
| Country | Korea, Republic of |
| City | Seoul |
| Period | 99/10/26 → 99/10/27 |
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ASJC Scopus subject areas
- Computer Graphics and Computer-Aided Design
- Hardware and Architecture
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
Cite this
Low power CMOS digital design for multimedia processors. / Kuroda, Tadahiro.
ICVC 1999 - 6th International Conference on VLSI and CAD. Institute of Electrical and Electronics Engineers Inc., 1999. p. 359-367 820930.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Low power CMOS digital design for multimedia processors
AU - Kuroda, Tadahiro
PY - 1999/1/1
Y1 - 1999/1/1
N2 - Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.
AB - Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.
UR - http://www.scopus.com/inward/record.url?scp=37849015883&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=37849015883&partnerID=8YFLogxK
U2 - 10.1109/ICVC.1999.820930
DO - 10.1109/ICVC.1999.820930
M3 - Conference contribution
AN - SCOPUS:37849015883
SN - 0780357272
SN - 9780780357273
SP - 359
EP - 367
BT - ICVC 1999 - 6th International Conference on VLSI and CAD
PB - Institute of Electrical and Electronics Engineers Inc.
ER -