Low power CMOS digital design for multimedia processors

T. Kuroda

doi:10.1109/ICVC.1999.820930

Low power CMOS digital design for multimedia processors

T. Kuroda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

Low-power, high-speed CMOS circuit design by means of supply-voltage (V_DD) and threshold-voltage (V_TH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower V_DD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control V_DD and V_TH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

Original language	English
Title of host publication	ICVC 1999 - 6th International Conference on VLSI and CAD
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	359-367
Number of pages	9
ISBN (Print)	0780357272, 9780780357273
DOIs	https://doi.org/10.1109/ICVC.1999.820930
Publication status	Published - 1999 Jan 1
Externally published	Yes
Event	6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of Duration: 1999 Oct 26 → 1999 Oct 27

Publication series

Name	ICVC 1999 - 6th International Conference on VLSI and CAD

Other

Other	6th International Conference on VLSI and CAD, ICVC 1999
Country	Korea, Republic of
City	Seoul
Period	99/10/26 → 99/10/27

ASJC Scopus subject areas

Computer Graphics and Computer-Aided Design
Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/ICVC.1999.820930

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Kuroda, T 1999, Low power CMOS digital design for multimedia processors. in ICVC 1999 - 6th International Conference on VLSI and CAD., 820930, ICVC 1999 - 6th International Conference on VLSI and CAD, Institute of Electrical and Electronics Engineers Inc., pp. 359-367, 6th International Conference on VLSI and CAD, ICVC 1999, Seoul, Korea, Republic of, 99/10/26. https://doi.org/10.1109/ICVC.1999.820930

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author = "T. Kuroda",

year = "1999",

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doi = "10.1109/ICVC.1999.820930",

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AB - Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

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M3 - Conference contribution

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SN - 9780780357273

T3 - ICVC 1999 - 6th International Conference on VLSI and CAD

SP - 359

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BT - ICVC 1999 - 6th International Conference on VLSI and CAD

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Y2 - 26 October 1999 through 27 October 1999

ER -

Low power CMOS digital design for multimedia processors

Abstract

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ASJC Scopus subject areas

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