Low power CMOS digital design for multimedia processors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

Low-power, high-speed CMOS circuit design by means of supply-voltage (VDD) and threshold-voltage (VTH) control is presented. Recent research achievements of MTCMOS and VTCMOS are described. Clustered voltage scaling to lower VDD for non-critical circuits is discussed. Design examples such as an MPEG-4 codec LSI are presented. Circuit designers can control VDD and VTH as objectives of design optimization. As a result, active power can be reduced to below half, while static power and chip throughput are maintained.

Original languageEnglish
Title of host publicationICVC 1999 - 6th International Conference on VLSI and CAD
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages359-367
Number of pages9
ISBN (Print)0780357272, 9780780357273
DOIs
Publication statusPublished - 1999 Jan 1
Externally publishedYes
Event6th International Conference on VLSI and CAD, ICVC 1999 - Seoul, Korea, Republic of
Duration: 1999 Oct 261999 Oct 27

Publication series

NameICVC 1999 - 6th International Conference on VLSI and CAD

Other

Other6th International Conference on VLSI and CAD, ICVC 1999
CountryKorea, Republic of
CitySeoul
Period99/10/2699/10/27

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ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kuroda, T. (1999). Low power CMOS digital design for multimedia processors. In ICVC 1999 - 6th International Conference on VLSI and CAD (pp. 359-367). [820930] (ICVC 1999 - 6th International Conference on VLSI and CAD). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICVC.1999.820930