Low power DT delta-sigma modulator with ring amplifier SC-integrator

Takuma Suguro, Hiroki Ishikuro

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)

    Abstract

    This paper presents a low power DT sigma-delta modulator for wide variety of sensor application using a ring amplifier for SC-integrator. The topology is a second order modulator with single-bit quantizer. Dead-zone effect of the ring amplifier in oversampling ADC is discussed. The fabricated test chip in 65nm CMOS process achieved SNDR of 62dB and 1MHz signal band at sampling frequency of 102.4MHz. The power consumption is 1mW and FoM is 483fJ/conv.step.

    Original languageEnglish
    Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages2006-2009
    Number of pages4
    Volume2016-July
    ISBN (Electronic)9781479953400
    DOIs
    Publication statusPublished - 2016 Jul 29
    Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
    Duration: 2016 May 222016 May 25

    Other

    Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
    CountryCanada
    CityMontreal
    Period16/5/2216/5/25

    Keywords

    • ADC
    • dead-zone
    • delta sigma
    • discrete time
    • ring amplifier

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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  • Cite this

    Suguro, T., & Ishikuro, H. (2016). Low power DT delta-sigma modulator with ring amplifier SC-integrator. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems (Vol. 2016-July, pp. 2006-2009). [7538970] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2016.7538970