Low-voltage technologies and circuits (Invited)

Tadahiro Kuroda; Takayasu Sakurai

doi:10.1109/9780470545058.part2

Low-voltage technologies and circuits (Invited)

Tadahiro Kuroda, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceeding › Chapter

5 Citations (Scopus)

Abstract

This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.

Original language	English
Title of host publication	Low-Power CMOS Design
Publisher	Wiley-IEEE Press
Pages	61-65
Number of pages	5
ISBN (Electronic)	9780470545058
ISBN (Print)	9780780334298
DOIs	https://doi.org/10.1109/9780470545058.part2
Publication status	Published - 1998 Jan 1
Externally published	Yes

ASJC Scopus subject areas

Engineering(all)
Computer Science(all)
Energy(all)

Access to Document

10.1109/9780470545058.part2

Cite this

@inbook{625dd3548fa84ed09a9a336be4e1e761,

title = "Low-voltage technologies and circuits (Invited)",

abstract = "This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.",

author = "Tadahiro Kuroda and Takayasu Sakurai",

year = "1998",

month = jan,

day = "1",

doi = "10.1109/9780470545058.part2",

language = "English",

isbn = "9780780334298",

pages = "61--65",

booktitle = "Low-Power CMOS Design",

publisher = "Wiley-IEEE Press",

}

TY - CHAP

T1 - Low-voltage technologies and circuits (Invited)

AU - Kuroda, Tadahiro

AU - Sakurai, Takayasu

PY - 1998/1/1

Y1 - 1998/1/1

N2 - This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.

AB - This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.

UR - http://www.scopus.com/inward/record.url?scp=0003206391&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0003206391&partnerID=8YFLogxK

U2 - 10.1109/9780470545058.part2

DO - 10.1109/9780470545058.part2

M3 - Chapter

AN - SCOPUS:0003206391

SN - 9780780334298

SP - 61

EP - 65

BT - Low-Power CMOS Design

PB - Wiley-IEEE Press

ER -

Low-voltage technologies and circuits (Invited)

Abstract

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this