Low-voltage technologies and circuits (Invited)

Tadahiro Kuroda, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceedingChapter

5 Citations (Scopus)

Abstract

This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.

Original languageEnglish
Title of host publicationLow-Power CMOS Design
PublisherJohn Wiley and Sons Inc.
Pages61-65
Number of pages5
ISBN (Electronic)9780470545058
ISBN (Print)9780780334298
DOIs
Publication statusPublished - 1998 Jan 1
Externally publishedYes

Fingerprint

Threshold voltage
Networks (circuits)
Electric potential
Silicon
Substrates

ASJC Scopus subject areas

  • Engineering(all)
  • Computer Science(all)
  • Energy(all)

Cite this

Kuroda, T., & Sakurai, T. (1998). Low-voltage technologies and circuits (Invited). In Low-Power CMOS Design (pp. 61-65). John Wiley and Sons Inc.. https://doi.org/10.1109/9780470545058.part2

Low-voltage technologies and circuits (Invited). / Kuroda, Tadahiro; Sakurai, Takayasu.

Low-Power CMOS Design. John Wiley and Sons Inc., 1998. p. 61-65.

Research output: Chapter in Book/Report/Conference proceedingChapter

Kuroda, T & Sakurai, T 1998, Low-voltage technologies and circuits (Invited). in Low-Power CMOS Design. John Wiley and Sons Inc., pp. 61-65. https://doi.org/10.1109/9780470545058.part2
Kuroda T, Sakurai T. Low-voltage technologies and circuits (Invited). In Low-Power CMOS Design. John Wiley and Sons Inc. 1998. p. 61-65 https://doi.org/10.1109/9780470545058.part2
Kuroda, Tadahiro ; Sakurai, Takayasu. / Low-voltage technologies and circuits (Invited). Low-Power CMOS Design. John Wiley and Sons Inc., 1998. pp. 61-65
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