Abstract
This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.
Original language | English |
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Title of host publication | Low-Power CMOS Design |
Publisher | Wiley-IEEE Press |
Pages | 61-65 |
Number of pages | 5 |
ISBN (Electronic) | 9780470545058 |
ISBN (Print) | 9780780334298 |
DOIs | |
Publication status | Published - 1998 Jan 1 |
Externally published | Yes |
ASJC Scopus subject areas
- Engineering(all)
- Computer Science(all)
- Energy(all)