Low-voltage technologies and circuits (Invited)

Tadahiro Kuroda; Takayasu Sakurai

doi:10.1109/9780470545058.part2

Low-voltage technologies and circuits (Invited)

Tadahiro Kuroda, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceeding › Chapter

5 Citations (Scopus)

Abstract

This paper reviews low-voltage device technologies and circuit design techniques for low-power, high- speed CMOS VLSls. Some of the recent developments, such as employing multiple threshold voltage and controlling threshold voltage through substrate bias in bulk CMOS and Silicon on Insulator (SOl) based technologies, are discussed. Future directions of low-power VLSls are also described.

Original language	English
Title of host publication	Low-Power CMOS Design
Publisher	Wiley-IEEE Press
Pages	61-65
Number of pages	5
ISBN (Electronic)	9780470545058
ISBN (Print)	9780780334298
DOIs	https://doi.org/10.1109/9780470545058.part2
Publication status	Published - 1998 Jan 1
Externally published	Yes

ASJC Scopus subject areas

Engineering(all)
Computer Science(all)
Energy(all)

Access to Document

10.1109/9780470545058.part2

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Kuroda, T., & Sakurai, T. (1998). Low-voltage technologies and circuits (Invited). In Low-Power CMOS Design (pp. 61-65). Wiley-IEEE Press. https://doi.org/10.1109/9780470545058.part2

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