Martini

A network interface controller chip for high performance computing with distributed PCs

Konosuke Watanabe, Tomohiro Otsuka, Junichiro Tsuchiya, Hiroaki Nishi, Junji Yamamoto, Noboru Tanabe, Tomohiro Kudoh, Hideharu Amano

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

In this paper, "Martini," a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called "On-the-fly (OTF)" and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.

Original languageEnglish
Pages (from-to)1282-1295
Number of pages14
JournalIEEE Transactions on Parallel and Distributed Systems
Volume18
Issue number9
DOIs
Publication statusPublished - 2007 Sep

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Interfaces (computer)
Chip
High Performance
Controller
Controllers
Computing
Communication
Latency
Bandwidth
Copying
Logic
Data storage equipment
Evaluation
Zero

Keywords

  • Network Interface Controller
  • PC Clusters
  • RHiNET
  • System Area Network

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Theoretical Computer Science
  • Computational Theory and Mathematics

Cite this

Martini : A network interface controller chip for high performance computing with distributed PCs. / Watanabe, Konosuke; Otsuka, Tomohiro; Tsuchiya, Junichiro; Nishi, Hiroaki; Yamamoto, Junji; Tanabe, Noboru; Kudoh, Tomohiro; Amano, Hideharu.

In: IEEE Transactions on Parallel and Distributed Systems, Vol. 18, No. 9, 09.2007, p. 1282-1295.

Research output: Contribution to journalArticle

Watanabe, Konosuke ; Otsuka, Tomohiro ; Tsuchiya, Junichiro ; Nishi, Hiroaki ; Yamamoto, Junji ; Tanabe, Noboru ; Kudoh, Tomohiro ; Amano, Hideharu. / Martini : A network interface controller chip for high performance computing with distributed PCs. In: IEEE Transactions on Parallel and Distributed Systems. 2007 ; Vol. 18, No. 9. pp. 1282-1295.
@article{0babddaebc2745169fca65c0de00874f,
title = "Martini: A network interface controller chip for high performance computing with distributed PCs",
abstract = "In this paper, {"}Martini,{"} a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called {"}On-the-fly (OTF){"} and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.",
keywords = "Network Interface Controller, PC Clusters, RHiNET, System Area Network",
author = "Konosuke Watanabe and Tomohiro Otsuka and Junichiro Tsuchiya and Hiroaki Nishi and Junji Yamamoto and Noboru Tanabe and Tomohiro Kudoh and Hideharu Amano",
year = "2007",
month = "9",
doi = "10.1109/TPDS.2007.1064",
language = "English",
volume = "18",
pages = "1282--1295",
journal = "IEEE Transactions on Parallel and Distributed Systems",
issn = "1045-9219",
publisher = "IEEE Computer Society",
number = "9",

}

TY - JOUR

T1 - Martini

T2 - A network interface controller chip for high performance computing with distributed PCs

AU - Watanabe, Konosuke

AU - Otsuka, Tomohiro

AU - Tsuchiya, Junichiro

AU - Nishi, Hiroaki

AU - Yamamoto, Junji

AU - Tanabe, Noboru

AU - Kudoh, Tomohiro

AU - Amano, Hideharu

PY - 2007/9

Y1 - 2007/9

N2 - In this paper, "Martini," a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called "On-the-fly (OTF)" and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.

AB - In this paper, "Martini," a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called "On-the-fly (OTF)" and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.

KW - Network Interface Controller

KW - PC Clusters

KW - RHiNET

KW - System Area Network

UR - http://www.scopus.com/inward/record.url?scp=34548280819&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=34548280819&partnerID=8YFLogxK

U2 - 10.1109/TPDS.2007.1064

DO - 10.1109/TPDS.2007.1064

M3 - Article

VL - 18

SP - 1282

EP - 1295

JO - IEEE Transactions on Parallel and Distributed Systems

JF - IEEE Transactions on Parallel and Distributed Systems

SN - 1045-9219

IS - 9

ER -