The Cool Mega-Array is a highly power-efficient coarse-grained reconfigurable accelerator, particularly aimed toward multimedia applications executed on battery-driven devices. It consists of a large processing elements array, without any memory element, a simple micro-controller for data management and the data memory. The power consumption of the PE array itself is very low, and can be further reduced by dynamically scaling its power voltage in order to adapt to the desired speed of computation. A modular version of this design is proposed, which provides the ability to reconfigure the PE array structure, and adapt its size to the application. This allows the execution of applications with different complexities and degrees of parallelism on a relatively smaller chip, compared to simply using a large PE array, depending on the implementation choices and the set of applications (4 times less processing elements in the implementation example). Power-leakage can also be reduced by using coarse-grained power-gating.