MuCCRA chips: Configurable dynamically-reconfigurable processors

Hideharu Amano, Yohei Hasegawa, Satoshi Tsutsumi, Takuro Nakamura, Takashi Nishimura, Vasutan Tanbunheng, Aepu Parimala, Toru Sano, Masaru Kato

Research output: Chapter in Book/Report/Conference proceedingConference contribution

41 Citations (Scopus)

Abstract

Coarse grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine in System-On-Chips (SoCs). Evaluation results in recent researches revealed that the parameters of optimal processor array structure: granularity, functions, array size, context size and interconnection flexibility, are completely different for each application. That is, DRPAs should be configurable for target SoCs and applications. MuCCRA is a project for developing a DRPA generator which can generate RTL model, testing environment and programming environment for various types of DRPAs just by selecting the specific parameters. Here, two prototype chips MuCCRA-1 and MuCCRA-2 developed in the project are introduced and evaluated. MuCCRA-1 was implemented with Rohm's 0.18um CMOS process mainly for multi-media applications, while MuCCRA-2 with ASPLA's 90nm CMOS process was designed focusing on area optimization used as a cost-effective IP in multi-core SoCs.

Original languageEnglish
Title of host publication2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Pages384-387
Number of pages4
DOIs
Publication statusPublished - 2007 Dec 1
Event2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju, Korea, Republic of
Duration: 2007 Nov 122007 Nov 14

Publication series

Name2007 IEEE Asian Solid-State Circuits Conference, A-SSCC

Other

Other2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
CountryKorea, Republic of
CityJeju
Period07/11/1207/11/14

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ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Amano, H., Hasegawa, Y., Tsutsumi, S., Nakamura, T., Nishimura, T., Tanbunheng, V., Parimala, A., Sano, T., & Kato, M. (2007). MuCCRA chips: Configurable dynamically-reconfigurable processors. In 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC (pp. 384-387). [4425711] (2007 IEEE Asian Solid-State Circuits Conference, A-SSCC). https://doi.org/10.1109/ASSCC.2007.4425711