NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.

Shinichiro Haruyama; Don Fussell

NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A graph algorithm to route noncrossing VDD and GND trees on one layer is developed for VLSI designs. The algorithm finds trees with as small an area as tractably possible under metal-migration and voltage-drop constraints. Experimental results show that the power wire area is considerably smaller than that of a previously developed method for single-layer routing.

Original language	English
Title of host publication	Unknown Host Publication Title
Publisher	IEEE
Pages	38-41
Number of pages	4
ISBN (Print)	0818608145
Publication status	Published - 1987 Dec 1
Externally published	Yes

ASJC Scopus subject areas

Engineering(all)

Fingerprint Dive into the research topics of 'NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.'. Together they form a unique fingerprint.

Cite this

@inproceedings{bc3d561dfdd044a39598b06fd10fb669,

title = "NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.",

abstract = "A graph algorithm to route noncrossing VDD and GND trees on one layer is developed for VLSI designs. The algorithm finds trees with as small an area as tractably possible under metal-migration and voltage-drop constraints. Experimental results show that the power wire area is considerably smaller than that of a previously developed method for single-layer routing.",

author = "Shinichiro Haruyama and Don Fussell",

year = "1987",

month = dec,

day = "1",

language = "English",

isbn = "0818608145",

publisher = "IEEE",

pages = "38--41",

booktitle = "Unknown Host Publication Title",

}

TY - GEN

T1 - NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.

AU - Haruyama, Shinichiro

AU - Fussell, Don

PY - 1987/12/1

Y1 - 1987/12/1

N2 - A graph algorithm to route noncrossing VDD and GND trees on one layer is developed for VLSI designs. The algorithm finds trees with as small an area as tractably possible under metal-migration and voltage-drop constraints. Experimental results show that the power wire area is considerably smaller than that of a previously developed method for single-layer routing.

AB - A graph algorithm to route noncrossing VDD and GND trees on one layer is developed for VLSI designs. The algorithm finds trees with as small an area as tractably possible under metal-migration and voltage-drop constraints. Experimental results show that the power wire area is considerably smaller than that of a previously developed method for single-layer routing.

UR - http://www.scopus.com/inward/record.url?scp=0023545872&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0023545872&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0023545872

SN - 0818608145

SP - 38

EP - 41

BT - Unknown Host Publication Title

PB - IEEE

ER -

NEW AREA-EFFICIENT POWER ROUTING ALGORITHM FOR VLSI LAYOUT.

Abstract

ASJC Scopus subject areas

Other files and links

Cite this