Newly Structured Expandable 52-Mbit/s, 48-Channel Time-Division Switching LSI with 2.4 Gbit/s Throughput

N. Yamanaka, S. Kikuchi, H. Miyanaga

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

An expandable Si bipolar 2.4Gbit/s throughput, 52Mbit/s 48-channel time-division switching LSI system is described. A high-throughput of 2.4Gbit/s and a power-dissipation of 5-3 W are achieved by adopting a low-voltage swing fourserial-gated differential bipolar circuit design and super selfaligned process (SST-1A) logic-in-memory LSI technology. This LSI is applicable to the digital video time-division switching and digital crossconnect systems of future B-ISDN.

Original languageEnglish
Pages (from-to)524-526
Number of pages3
JournalElectronics Letters
Volume26
Issue number8
DOIs
Publication statusPublished - 1990 Jan 1
Externally publishedYes

Keywords

  • Bipolar devices
  • Circuit theory and design
  • Large scale integration
  • Silicon

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Newly Structured Expandable 52-Mbit/s, 48-Channel Time-Division Switching LSI with 2.4 Gbit/s Throughput'. Together they form a unique fingerprint.

Cite this