Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs

Hiroshi Watanabe, Ken Uchida, Atsuhiro Kinoshita

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

Capacitance-voltage (C-V) characteristics of double-gate ultrathin silicon-on-insulator (SOI) MOSFETs are numerically investigated in detail. The measured back-gate bias dependence is reproduced by the Poisson-Schrödinger solver including the highly precise physical models for many-body interactions of carrier-carrier and carrier-ion, and for incomplete ionization of doping impurities in whole semiconductor regions of n+poly-Si/oxide/SOI/oxide/p-Si capacitor including the volume inversion. In addition, we study the higher subband effect at higher temperature in detail, in order to deduce the impacts of self-heating and nonstatic transport.

Original languageEnglish
Pages (from-to)52-58
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume54
Issue number1
DOIs
Publication statusPublished - 2007 Jan
Externally publishedYes

Fingerprint

capacitance-voltage characteristics
Silicon oxides
Silicon
Polysilicon
Oxides
Ionization
Capacitors
Capacitance
field effect transistors
Doping (additives)
insulators
Impurities
Ions
Semiconductor materials
Heating
Electric potential
silicon
silicon oxides
Temperature
capacitors

Keywords

  • Confinement
  • Double-gate
  • MOS devices
  • Silicon-on-insulator (SOI)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

Cite this

Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs. / Watanabe, Hiroshi; Uchida, Ken; Kinoshita, Atsuhiro.

In: IEEE Transactions on Electron Devices, Vol. 54, No. 1, 01.2007, p. 52-58.

Research output: Contribution to journalArticle

Watanabe, Hiroshi ; Uchida, Ken ; Kinoshita, Atsuhiro. / Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs. In: IEEE Transactions on Electron Devices. 2007 ; Vol. 54, No. 1. pp. 52-58.
@article{c78f6b2caee44238a7400373f4bc0da5,
title = "Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs",
abstract = "Capacitance-voltage (C-V) characteristics of double-gate ultrathin silicon-on-insulator (SOI) MOSFETs are numerically investigated in detail. The measured back-gate bias dependence is reproduced by the Poisson-Schr{\"o}dinger solver including the highly precise physical models for many-body interactions of carrier-carrier and carrier-ion, and for incomplete ionization of doping impurities in whole semiconductor regions of n+poly-Si/oxide/SOI/oxide/p-Si capacitor including the volume inversion. In addition, we study the higher subband effect at higher temperature in detail, in order to deduce the impacts of self-heating and nonstatic transport.",
keywords = "Confinement, Double-gate, MOS devices, Silicon-on-insulator (SOI)",
author = "Hiroshi Watanabe and Ken Uchida and Atsuhiro Kinoshita",
year = "2007",
month = "1",
doi = "10.1109/TED.2006.887053",
language = "English",
volume = "54",
pages = "52--58",
journal = "IEEE Transactions on Electron Devices",
issn = "0018-9383",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "1",

}

TY - JOUR

T1 - Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs

AU - Watanabe, Hiroshi

AU - Uchida, Ken

AU - Kinoshita, Atsuhiro

PY - 2007/1

Y1 - 2007/1

N2 - Capacitance-voltage (C-V) characteristics of double-gate ultrathin silicon-on-insulator (SOI) MOSFETs are numerically investigated in detail. The measured back-gate bias dependence is reproduced by the Poisson-Schrödinger solver including the highly precise physical models for many-body interactions of carrier-carrier and carrier-ion, and for incomplete ionization of doping impurities in whole semiconductor regions of n+poly-Si/oxide/SOI/oxide/p-Si capacitor including the volume inversion. In addition, we study the higher subband effect at higher temperature in detail, in order to deduce the impacts of self-heating and nonstatic transport.

AB - Capacitance-voltage (C-V) characteristics of double-gate ultrathin silicon-on-insulator (SOI) MOSFETs are numerically investigated in detail. The measured back-gate bias dependence is reproduced by the Poisson-Schrödinger solver including the highly precise physical models for many-body interactions of carrier-carrier and carrier-ion, and for incomplete ionization of doping impurities in whole semiconductor regions of n+poly-Si/oxide/SOI/oxide/p-Si capacitor including the volume inversion. In addition, we study the higher subband effect at higher temperature in detail, in order to deduce the impacts of self-heating and nonstatic transport.

KW - Confinement

KW - Double-gate

KW - MOS devices

KW - Silicon-on-insulator (SOI)

UR - http://www.scopus.com/inward/record.url?scp=33846070537&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33846070537&partnerID=8YFLogxK

U2 - 10.1109/TED.2006.887053

DO - 10.1109/TED.2006.887053

M3 - Article

AN - SCOPUS:33846070537

VL - 54

SP - 52

EP - 58

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

SN - 0018-9383

IS - 1

ER -