On-the-fly sending: A low latency high bandwidth message transfer mechanism

Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

Low latency high bandwidth network interface architectures are described. This paper proposes two types of architectures, atomic on-the& (OTF)sending with a header TLB, and block on-the-$y sending with protection stampable window memory. These techniques work very effectively with MEMOnet which is a class of network interface card(NIC)plugged into a memory slot. Weare developing a network interface controller LSI called Martini. The Martini chip is used in two prototype network interface cards, DIMMnet-1 based on MEMOnet, and RHiNET-2INI based on PCI. On a DIMMnet-I, the software overhead needed to generate a message is only 1 CPU cycle and the estimated hardware delay is less than 1OOns using atomic OTF sending. The estimated achievable sending bandwidth of DIMMnet-1 using block OTF sending is 984MBls which was observed in our experiments. This bandwidth is 7.4 times higher than the maximum bandwidth of PCI. This excellent performance is available for cheap personal computers with DIMM slots. This paper also discribes the e$ fects of block OTF sending for a PCI-based NIC.

Original languageEnglish
Title of host publicationProceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000
EditorsHal Sudborough, Burkhard Monien, D. Frank Hsu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages186-193
Number of pages8
ISBN (Electronic)0769509363, 9780769509365
DOIs
Publication statusPublished - 2000
Event5th International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000 - Dallas, United States
Duration: 2000 Dec 72000 Dec 9

Publication series

NameProceedings - International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000

Conference

Conference5th International Symposium on Parallel Architectures, Algorithms, and Networks, I-SPAN 2000
Country/TerritoryUnited States
CityDallas
Period00/12/700/12/9

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Computer Networks and Communications
  • Hardware and Architecture

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