Optimization and control of VDD and VTH for low-power, high-speed CMOS design

Tadahiro Kuroda

    Research output: Contribution to journalConference articlepeer-review

    14 Citations (Scopus)


    It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.

    Original languageEnglish
    Pages (from-to)28-34
    Number of pages7
    JournalIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
    Publication statusPublished - 2002 Dec 1
    EventIEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States
    Duration: 2002 Nov 102002 Nov 14

    ASJC Scopus subject areas

    • Software
    • Computer Science Applications
    • Computer Graphics and Computer-Aided Design

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