Parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems

Nobuo Funabiki, Yoshiyasu Takefuji

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

This paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of our algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-time-slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors.

Original languageEnglish
Pages (from-to)2890-2898
Number of pages9
JournalIEEE Transactions on Communications
Volume42
Issue number10
DOIs
Publication statusPublished - 1994 Oct
Externally publishedYes

Fingerprint

Time division multiplexing
Switching systems
Parallel algorithms
Neural networks

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Cite this

Parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems. / Funabiki, Nobuo; Takefuji, Yoshiyasu.

In: IEEE Transactions on Communications, Vol. 42, No. 10, 10.1994, p. 2890-2898.

Research output: Contribution to journalArticle

@article{c181796016154101b41d23e35f8fe94a,
title = "Parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems",
abstract = "This paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of our algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-time-slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors.",
author = "Nobuo Funabiki and Yoshiyasu Takefuji",
year = "1994",
month = "10",
doi = "10.1109/26.328959",
language = "English",
volume = "42",
pages = "2890--2898",
journal = "IEEE Transactions on Communications",
issn = "0096-1965",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "10",

}

TY - JOUR

T1 - Parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems

AU - Funabiki, Nobuo

AU - Takefuji, Yoshiyasu

PY - 1994/10

Y1 - 1994/10

N2 - This paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of our algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-time-slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors.

AB - This paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of our algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-time-slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors.

UR - http://www.scopus.com/inward/record.url?scp=0028517560&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028517560&partnerID=8YFLogxK

U2 - 10.1109/26.328959

DO - 10.1109/26.328959

M3 - Article

VL - 42

SP - 2890

EP - 2898

JO - IEEE Transactions on Communications

JF - IEEE Transactions on Communications

SN - 0096-1965

IS - 10

ER -