Performance analysis of multistage ATM switch with partially shared buffers under unbalanced traffic

Keisuke Takemori, Shigeki Shiokawa, Iwao Sasase

Research output: Contribution to conferencePaper

Abstract

The system delay and cell loss probability of multi-stage ATM switch with partially shared buffers under nonuniform traffic are analyzed. The unbalanced traffic model is described by a vector of offered output traffic intensities in the switching network. By considering the path to each output port, we analyze the system delay and the cell loss probability based on the discrete time Markov chain. The results show that under nonuniform traffic, the system delay and cell loss probability of the hot-spot which has high traffic intensity are severely degraded. The effects of hot-spot traffic on the performance of the output ports in the neighborhood of the hot-spot are also considered.

Original languageEnglish
Pages687-691
Number of pages5
Publication statusPublished - 1996 Jan 1
EventProceedings of the 1996 IEEE International Conference on Communications, ICC'96. Part 1 (of 3) - Dallas, TX, USA
Duration: 1996 Jun 231996 Jun 27

Other

OtherProceedings of the 1996 IEEE International Conference on Communications, ICC'96. Part 1 (of 3)
CityDallas, TX, USA
Period96/6/2396/6/27

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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    Takemori, K., Shiokawa, S., & Sasase, I. (1996). Performance analysis of multistage ATM switch with partially shared buffers under unbalanced traffic. 687-691. Paper presented at Proceedings of the 1996 IEEE International Conference on Communications, ICC'96. Part 1 (of 3), Dallas, TX, USA, .