Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor

Yohei Hasegawa, Shohei Abe, Shunsuke Kurotaki, Vu Manh Tuan, Naohiro Katsura, Takuro Nakamura, Takashi Nishimura, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a datapath called a context from the on-chip repository of sixteen circuit configurations at runtime. The time-multiplexed execution based on the multi-context functionality is expected to drastically improve area and power efficiency. To demonstrate the impact of the time-multiplexed execution, we have implemented several stream applications on DRP with various context sizes. Throughout the evaluation based on real application designs, we analyzed the impact of the time-multiplexed execution on performance and power dissipation quantitatively.

Original languageEnglish
Title of host publication20th International Parallel and Distributed Processing Symposium, IPDPS 2006
Volume2006
DOIs
Publication statusPublished - 2006

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Energy dissipation
Electronic equipment
Networks (circuits)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Hasegawa, Y., Abe, S., Kurotaki, S., Tuan, V. M., Katsura, N., Nakamura, T., ... Amano, H. (2006). Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. In 20th International Parallel and Distributed Processing Symposium, IPDPS 2006 (Vol. 2006). [1639431] https://doi.org/10.1109/IPDPS.2006.1639431

Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. / Hasegawa, Yohei; Abe, Shohei; Kurotaki, Shunsuke; Tuan, Vu Manh; Katsura, Naohiro; Nakamura, Takuro; Nishimura, Takashi; Amano, Hideharu.

20th International Parallel and Distributed Processing Symposium, IPDPS 2006. Vol. 2006 2006. 1639431.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hasegawa, Y, Abe, S, Kurotaki, S, Tuan, VM, Katsura, N, Nakamura, T, Nishimura, T & Amano, H 2006, Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. in 20th International Parallel and Distributed Processing Symposium, IPDPS 2006. vol. 2006, 1639431. https://doi.org/10.1109/IPDPS.2006.1639431
Hasegawa Y, Abe S, Kurotaki S, Tuan VM, Katsura N, Nakamura T et al. Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. In 20th International Parallel and Distributed Processing Symposium, IPDPS 2006. Vol. 2006. 2006. 1639431 https://doi.org/10.1109/IPDPS.2006.1639431
Hasegawa, Yohei ; Abe, Shohei ; Kurotaki, Shunsuke ; Tuan, Vu Manh ; Katsura, Naohiro ; Nakamura, Takuro ; Nishimura, Takashi ; Amano, Hideharu. / Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. 20th International Parallel and Distributed Processing Symposium, IPDPS 2006. Vol. 2006 2006.
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