Performance evaluation of 3-dimensional MIN with cache consistency maintenance mechanism

Yasuki Tanabe, Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Toshihiro Hanawa, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In this paper we evaluate the two component architectures for the MIN-connected multiprocessors: the Piled Banyan Switching Fabrics (PBSF) and MIN with Cache consistency mechanism (MINC). The PBSF is a high bandwidth MIN with three dimensional structure. The MINC is a mechanism for controlling the consistency of private cache modules located between processors and the MIN. The simulation result shows that (1) the MINC improves performance and (2) the PBSF with cache provides the sufficient throughput.

Original languageEnglish
Title of host publicationProceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2003
EditorsH.R. Arabnia, Y. Mun, H.R. Arabnia, Y. Mun
Pages1148-1154
Number of pages7
Publication statusPublished - 2003
EventProceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications - Las Vegas, NV, United States
Duration: 2003 Jun 232003 Jun 26

Publication series

NameProceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications
Volume3

Other

OtherProceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications
Country/TerritoryUnited States
CityLas Vegas, NV
Period03/6/2303/6/26

Keywords

  • Instruction level simulation
  • Multistage interconnection networks
  • Parallel architectures

ASJC Scopus subject areas

  • Engineering(all)

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