Performance evaluation of SNAIL

A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture

Junji Yamamoto, Takashi Fujiwara, Takuji Komeda, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Simple Serial Synchronized (SSS)-Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and also solves the pin-limitation problem. Here, design, implementation, and evaluation of a multiprocessor prototype called the SNAIL with the SSS-MIN are presented. The heart of SNAIL is a prototype 1 μm CMOS SSS-MIN gate array chip which exchanges packets from 16 inputs at a 50 MHz clock speed. The message combining is implemented with only a 20% increase in hardware. From empirical evaluation with some application programs, it appears that the latency and synchronization overhead of the SSS-MIN are tolerable, and the bandwidth of the SSS-MIN is sufficient.

Original languageEnglish
Pages (from-to)1081-1103
Number of pages23
JournalParallel Computing
Volume25
Issue number9
DOIs
Publication statusPublished - 1999 Sep

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Multistage Interconnection Networks
Network Architecture
Multiprocessor
Network architecture
Application programs
Computer hardware
Performance Evaluation
Clocks
Synchronization
Bandwidth
Data storage equipment
Communication
Prototype
Evaluation
Latency
Simplify
Chip
Hardware
Sufficient
Module

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Control and Systems Engineering

Cite this

Performance evaluation of SNAIL : A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture. / Yamamoto, Junji; Fujiwara, Takashi; Komeda, Takuji; Kamei, Takayuki; Hanawa, Toshihiro; Amano, Hideharu.

In: Parallel Computing, Vol. 25, No. 9, 09.1999, p. 1081-1103.

Research output: Contribution to journalArticle

Yamamoto, Junji ; Fujiwara, Takashi ; Komeda, Takuji ; Kamei, Takayuki ; Hanawa, Toshihiro ; Amano, Hideharu. / Performance evaluation of SNAIL : A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture. In: Parallel Computing. 1999 ; Vol. 25, No. 9. pp. 1081-1103.
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