Abstract
A hyper-thin SOI memory device that has both conduction channel and storage islands at the lower gate voltage is demonstrated. It shows both Coulomb staircase and oscillations at 20 K. By using coexistence of memory with Coulomb blockade effects, the Coulomb oscillation phase is well controlled. This will open a way to the robust nano-structure devices, including the functional devices for multi-value memory/logic.
Original language | English |
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Pages | 138-139 |
Number of pages | 2 |
Publication status | Published - 1999 Dec 1 |
Event | Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC) - Santa Barbara, CA, USA Duration: 1999 Jun 28 → 1999 Jun 30 |
Other
Other | Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC) |
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City | Santa Barbara, CA, USA |
Period | 99/6/28 → 99/6/30 |
ASJC Scopus subject areas
- Engineering(all)