Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB

Yu Fujita, Hyate Okuhara, Koichiro Masuyama, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4% difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-Array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4% of energy is saved with much small effort of measurements.

Original languageEnglish
Title of host publicationProceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages21-29
Number of pages9
ISBN (Print)9781467397971
DOIs
Publication statusPublished - 2016 Mar 2
Event3rd International Symposium on Computing and Networking, CANDAR 2015 - Sapporo, Hokkaido, Japan
Duration: 2015 Dec 82015 Dec 11

Other

Other3rd International Symposium on Computing and Networking, CANDAR 2015
CountryJapan
CitySapporo, Hokkaido
Period15/12/815/12/11

Fingerprint

Bias voltage
Particle accelerators
Microcontrollers
Silicon
Electric potential
Low power electronics
Temperature
Processing

Keywords

  • Body bias control
  • Power optimization
  • SOTB

ASJC Scopus subject areas

  • Computer Science Applications
  • Computational Theory and Mathematics
  • Computer Networks and Communications

Cite this

Fujita, Y., Okuhara, H., Masuyama, K., & Amano, H. (2016). Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. In Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015 (pp. 21-29). [7424265] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CANDAR.2015.19

Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. / Fujita, Yu; Okuhara, Hyate; Masuyama, Koichiro; Amano, Hideharu.

Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc., 2016. p. 21-29 7424265.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fujita, Y, Okuhara, H, Masuyama, K & Amano, H 2016, Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. in Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015., 7424265, Institute of Electrical and Electronics Engineers Inc., pp. 21-29, 3rd International Symposium on Computing and Networking, CANDAR 2015, Sapporo, Hokkaido, Japan, 15/12/8. https://doi.org/10.1109/CANDAR.2015.19
Fujita Y, Okuhara H, Masuyama K, Amano H. Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. In Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc. 2016. p. 21-29. 7424265 https://doi.org/10.1109/CANDAR.2015.19
Fujita, Yu ; Okuhara, Hyate ; Masuyama, Koichiro ; Amano, Hideharu. / Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB. Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 21-29
@inproceedings{9affe54c9ad947c3be331c29e581427a,
title = "Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB",
abstract = "For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4{\%} difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-Array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4{\%} of energy is saved with much small effort of measurements.",
keywords = "Body bias control, Power optimization, SOTB",
author = "Yu Fujita and Hyate Okuhara and Koichiro Masuyama and Hideharu Amano",
year = "2016",
month = "3",
day = "2",
doi = "10.1109/CANDAR.2015.19",
language = "English",
isbn = "9781467397971",
pages = "21--29",
booktitle = "Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Power Optimization Considering the Chip Temperature of Low Power Reconfigurable Accelerator CMA-SOTB

AU - Fujita, Yu

AU - Okuhara, Hyate

AU - Masuyama, Koichiro

AU - Amano, Hideharu

PY - 2016/3/2

Y1 - 2016/3/2

N2 - For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4% difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-Array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4% of energy is saved with much small effort of measurements.

AB - For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). This chip has three voltages for controlling power and performance, supply voltage, PE-Array body bias voltage and microcontroller body bias voltage. In order to find the optimal operational point for a given requirement, a large effort for measurements and adjustments is required. This paper proposes power model for finding the optimal operation point from several measurement results. From the proposed model, the power can be estimated with 4.4% difference from the measured value on average. By using the model, the optimal source voltage and body bias voltages for PE-Array and microcontroller can be obtained for a given operational frequency. Compared with the result of the exhaustive search, 37.4% of energy is saved with much small effort of measurements.

KW - Body bias control

KW - Power optimization

KW - SOTB

UR - http://www.scopus.com/inward/record.url?scp=84964770366&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84964770366&partnerID=8YFLogxK

U2 - 10.1109/CANDAR.2015.19

DO - 10.1109/CANDAR.2015.19

M3 - Conference contribution

AN - SCOPUS:84964770366

SN - 9781467397971

SP - 21

EP - 29

BT - Proceedings - 2015 3rd International Symposium on Computing and Networking, CANDAR 2015

PB - Institute of Electrical and Electronics Engineers Inc.

ER -