Prioritized SMT architecture with IPC control method for real-time processing

Nobuyuki Yamasaki, Ikuo Magaki, Tsutomu Itou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)

Abstract

This paper describes a novel processor architecture, the prioritized SMT architecture with the IPC control method, to guarantee the execution time of real-time threads. Based on priority set by a real-time scheduler, all hardware resources including cache systems, fetch, issue, and execution units, are controlled, so that our processor can execute multiple threads in real-time. All runnable threads are simultaneously executed as much as possible in priority order, so that the execution order becomes congruent with the priority order set by a real-time scheduler. If a resource conflict occurs, the lower priority threads are kept waiting until the higher priority thread finishes using the resource. In brief, context switching required for real-time scheduling and execution is converted to the prioritized SMT execution. Here, some triggers including cache misses and branch prediction misses fluctuate the execution speed of a thread. Additionally, in case of an SMT processor, the execution time of each thread may vary according to a combination of simultaneous executing threads. To guarantee the execution time of real-time threads accurately, the IPC control method that monitors and controls each thread IPC in a feedback loop is designed and implemented. Our IPC control method can keep the IPC deviation of the thread within ±1% bounds, if the target IPC is less than 80% of the single thread execution IPC. Our processor is implemented as a processing core of a system LSI, which process was TSMC 0.13um 8 layered Cu wiring, used for distributed real-time systems including humanoid robots, bilateral robots, embedded control systems, and ubiquitous computing systems.

Original languageEnglish
Title of host publicationProceedings - RTAS 2007
Subtitle of host publication13th IEEE Real-Time and Embedded Technology and Applications Symposium
Pages12-21
Number of pages10
DOIs
Publication statusPublished - 2007 Aug 28
Event13th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS'07 - Bellevue, WA, United States
Duration: 2007 Apr 32007 Apr 6

Publication series

NameProceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS
ISSN (Print)1545-3421

Other

Other13th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS'07
CountryUnited States
CityBellevue, WA
Period07/4/307/4/6

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Yamasaki, N., Magaki, I., & Itou, T. (2007). Prioritized SMT architecture with IPC control method for real-time processing. In Proceedings - RTAS 2007: 13th IEEE Real-Time and Embedded Technology and Applications Symposium (pp. 12-21). [4155306] (Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS). https://doi.org/10.1109/RTAS.2007.28