PROTEUS: Programmable hardware for telecommunication systems

N. Ohta, H. Nakada, K. Yamada, A. Tsutsui, T. Miyazaki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Citations (Scopus)

Abstract

This paper discusses a new architecture for programmable hardware targeted at high-speed digital telecommunication systems and describes a preliminary design. The basic architecture of the programmable hardware is proposed based on the characteristics of functions and an analysis of logic used in actual communication subsystems performing high-speed bit level operations. The proposed architecture, called PROTEUS, includes a pipeline structure of logic and latch groups, and a 2-stage logic block structure that consists of small LUTs and wide gates. The design strategy of a prototype chip and the CAD techniques used to achieve the required performance are also discussed.

Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Editors Anon
PublisherIEEE
Pages178-183
Number of pages6
Publication statusPublished - 1994
EventProceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA
Duration: 1994 Oct 101994 Oct 12

Other

OtherProceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors
CityCambridge, MA, USA
Period94/10/1094/10/12

Fingerprint

Telecommunication systems
Hardware
Computer aided design
Pipelines
Communication

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Ohta, N., Nakada, H., Yamada, K., Tsutsui, A., & Miyazaki, T. (1994). PROTEUS: Programmable hardware for telecommunication systems. In Anon (Ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (pp. 178-183). IEEE.

PROTEUS : Programmable hardware for telecommunication systems. / Ohta, N.; Nakada, H.; Yamada, K.; Tsutsui, A.; Miyazaki, T.

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. ed. / Anon. IEEE, 1994. p. 178-183.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ohta, N, Nakada, H, Yamada, K, Tsutsui, A & Miyazaki, T 1994, PROTEUS: Programmable hardware for telecommunication systems. in Anon (ed.), Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, pp. 178-183, Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors, Cambridge, MA, USA, 94/10/10.
Ohta N, Nakada H, Yamada K, Tsutsui A, Miyazaki T. PROTEUS: Programmable hardware for telecommunication systems. In Anon, editor, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE. 1994. p. 178-183
Ohta, N. ; Nakada, H. ; Yamada, K. ; Tsutsui, A. ; Miyazaki, T. / PROTEUS : Programmable hardware for telecommunication systems. Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. editor / Anon. IEEE, 1994. pp. 178-183
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