Proxy responses by FPGA-based switch for MapReduce stragglers

Koya Mitsuzuka, Michihiro Koibuchi, Hideharu Amano, Hiroki Matsutani

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

In parallel processing applications, a few worker nodes called "stragglers", which execute their tasks significantly slower than other tasks, increase the execution time of the job. In this paper, we propose a network switch based straggler handling system to mitigate the burden of the compute nodes. We also propose how to offload detecting stragglers and computing their results in the network switch with no additional communications between worker nodes. We introduce some approximate techniques for the proxy computation and response at the switch; thus our switch is called "ApproxSW." As a result of a simulation experiment, the proposed approximation based on task similarity achieves the best accuracy in terms of quality of generated Map outputs. We also analyze how to suppress unnecessary proxy computation by the ApproxSW. We implement ApproxSW on NetFPGA-SUME board that has four 10Gbit Ethernet (10GbE) interfaces and a Virtex-7 FPGA. Experimental results shows that the ApproxSW functions do not degrade the original 10GbE switch performance.

Original languageEnglish
Pages (from-to)2258-2268
Number of pages11
JournalIEICE Transactions on Information and Systems
VolumeE101D
Issue number9
DOIs
Publication statusPublished - 2018 Sep 1

Keywords

  • FPGA
  • MapReduce
  • Straggler

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

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