@inproceedings{247f1659ff1d4f22a153ead93413e372,
title = "RAM-based hardware accelerator for network data anonymization",
abstract = "Many network services including intrusion detection and recommendation provide their services by analyzing information acquired from network transactions. A careful analysis of these data can reveal valuable information when deep packet inspection is performed. Since these packet analyses generate sensitive information from enormous volumes of transmitted data, the requirement for data anonymization has been discussed. There have been many studies of anonymization techniques and their implementation in software applications. However, limited research has been undertaken regarding hardware-based anonymizers. This paper proposes and evaluates a RAM-based anonymization architecture that maintains both high throughput and a low information-loss ratio.",
keywords = "Anonymization, Deep Packet Inspection, FPGA, k-anonymity, l-diversity",
author = "Fumito Yamaguchi and Kanae Matsui and Hiroaki Nishi",
year = "2014",
month = oct,
day = "16",
doi = "10.1109/FPL.2014.6927400",
language = "English",
series = "Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014",
note = "24th International Conference on Field Programmable Logic and Applications, FPL 2014 ; Conference date: 01-09-2014 Through 05-09-2014",
}