RDT network router chip

Hiroaki Nishi, Hideharu Amano, Katsunobu Nishimura, Ken ichiro Anjo, Tomohiro Kudoh

Research output: Contribution to conferencePaper

Abstract

To implement reduced hierarchical bit-map directory (RHBD) scheme efficiently, a novel interconnection network Recursive Diagonal Torus (RDT) chip which equips hierarchical multicast mechanism without clock and acknowledge combining mechanism is developed. It transfers all packets synchronized with a unique central processing unit clock by using 0.5 μBiCMOS silicon on glass technology. It also allows packet users to push and pull a flit of the packet simultaneously. These mixed design approach with schematic and very high speed integrated circuit hardware description languages permits development of these complicated chips.

Original languageEnglish
Pages675-676
Number of pages2
Publication statusPublished - 1997 Jan 1
EventProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn
Duration: 1997 Jan 281997 Jan 31

Other

OtherProceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC
CityChiba, Jpn
Period97/1/2897/1/31

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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  • Cite this

    Nishi, H., Amano, H., Nishimura, K., Anjo, K. I., & Kudoh, T. (1997). RDT network router chip. 675-676. Paper presented at Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, Chiba, Jpn, .