Responsive processor for parallel/distributed real-time control

Research output: Contribution to conferencePaper

20 Citations (Scopus)

Abstract

This paper describes the design and implementation of Responsive Processor for parallel/distributed real-time control, which can control various embedded systems including robots, home automation, factory automation, etc. Responsive Processor integrates an MPU core (SPARC), four Responsive Links for real-time communication, and many peripheral functions including SDRAM I/F, DMAC, PCI, USB, PWM generators, pulse counters, A/D converters, D/A converters, etc., in an ASIC chip. At the core part of the chip, Responsive Link provides the scalable real-time communication by four pairs of a full-duplex event link and a full-duplex data link. Each packet on the link is prioritized to enable overtaking and shortcut routing. Many kinds of control systems can be composed by connecting Responsive Processors using Responsive Links.

Original languageEnglish
Pages1238-1244
Number of pages7
Publication statusPublished - 2001 Dec 1
Event2001 IEEE/RSJ International Conference on Intelligent Robots and Systems - Maui, HI, United States
Duration: 2001 Oct 292001 Nov 3

Other

Other2001 IEEE/RSJ International Conference on Intelligent Robots and Systems
CountryUnited States
CityMaui, HI
Period01/10/2901/11/3

Keywords

  • Parallel/distributed control
  • Real-time communication
  • Responsive link
  • System-on-a-chip

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Software
  • Computer Vision and Pattern Recognition
  • Computer Science Applications

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  • Cite this

    Yamasaki, N. (2001). Responsive processor for parallel/distributed real-time control. 1238-1244. Paper presented at 2001 IEEE/RSJ International Conference on Intelligent Robots and Systems, Maui, HI, United States.