Abstract
In this paper, we describe a noncontact inductive-coupling data transmission link employing rotary data encoding. A system using this data-transmission link is inherently insensitive to jitter introduced in the channel and consumes approximately 50% less power than previously reported solutions. The system is targeted for applications benefiting from simultaneous noncontact power and data transmission, such as wafer-level testing, memory card interfaces, and inter-strata data communication in 3-D integrated circuits. Functionality of the proposed link is verified experimentally with a test chip developed in an 0.18-μm CMOS process. In the second part of this paper, we introduce a design of a high-speed data transceiver using rotary coding. We demonstrate that, because of properties of the rotary coding, a simple transceiver without a PLL-based CDR circuit can operate at data rates limited only by characteristics of the physical channel. For performance optimization, we have developed a new family of ternary logic gates including latches, D-flip-flops, and multiplexers.
| Original language | English |
|---|---|
| Article number | 6301782 |
| Pages (from-to) | 2643-2653 |
| Number of pages | 11 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 47 |
| Issue number | 11 |
| DOIs | |
| Publication status | Published - 2012 |
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Keywords
- Binary codes
- channel coding
- data communication
- decoding
- encoding
- flip-flops
- inductive power transmission
- logic gates
ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Rotary coding for power reduction and S/N improvement in inductive-coupling data communication. / Radecki, Andrzej; Miura, Noriyuki; Ishikuro, Hiroki; Kuroda, Tadahiro.
In: IEEE Journal of Solid-State Circuits, Vol. 47, No. 11, 6301782, 2012, p. 2643-2653.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Rotary coding for power reduction and S/N improvement in inductive-coupling data communication
AU - Radecki, Andrzej
AU - Miura, Noriyuki
AU - Ishikuro, Hiroki
AU - Kuroda, Tadahiro
PY - 2012
Y1 - 2012
N2 - In this paper, we describe a noncontact inductive-coupling data transmission link employing rotary data encoding. A system using this data-transmission link is inherently insensitive to jitter introduced in the channel and consumes approximately 50% less power than previously reported solutions. The system is targeted for applications benefiting from simultaneous noncontact power and data transmission, such as wafer-level testing, memory card interfaces, and inter-strata data communication in 3-D integrated circuits. Functionality of the proposed link is verified experimentally with a test chip developed in an 0.18-μm CMOS process. In the second part of this paper, we introduce a design of a high-speed data transceiver using rotary coding. We demonstrate that, because of properties of the rotary coding, a simple transceiver without a PLL-based CDR circuit can operate at data rates limited only by characteristics of the physical channel. For performance optimization, we have developed a new family of ternary logic gates including latches, D-flip-flops, and multiplexers.
AB - In this paper, we describe a noncontact inductive-coupling data transmission link employing rotary data encoding. A system using this data-transmission link is inherently insensitive to jitter introduced in the channel and consumes approximately 50% less power than previously reported solutions. The system is targeted for applications benefiting from simultaneous noncontact power and data transmission, such as wafer-level testing, memory card interfaces, and inter-strata data communication in 3-D integrated circuits. Functionality of the proposed link is verified experimentally with a test chip developed in an 0.18-μm CMOS process. In the second part of this paper, we introduce a design of a high-speed data transceiver using rotary coding. We demonstrate that, because of properties of the rotary coding, a simple transceiver without a PLL-based CDR circuit can operate at data rates limited only by characteristics of the physical channel. For performance optimization, we have developed a new family of ternary logic gates including latches, D-flip-flops, and multiplexers.
KW - Binary codes
KW - channel coding
KW - data communication
KW - decoding
KW - encoding
KW - flip-flops
KW - inductive power transmission
KW - logic gates
UR - http://www.scopus.com/inward/record.url?scp=84869238629&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84869238629&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2012.2211656
DO - 10.1109/JSSC.2012.2211656
M3 - Article
AN - SCOPUS:84869238629
VL - 47
SP - 2643
EP - 2653
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
SN - 0018-9200
IS - 11
M1 - 6301782
ER -