Scaling analysis of nanoelectromechanical memory devices

Tasuku Nagami, Yoshishige Tsuchiya, Ken Uchida, Hiroshi Mizuta, Shunri Oda

    Research output: Contribution to journalArticle

    11 Citations (Scopus)

    Abstract

    Numerical simulation of electromechanical switching for bistable bridges in non-volatile nanoelectromechanical (NEM) memory devices suggests that performance of memory characteristics enhanced by decreasing suspended floating gate length. By conducting a two-dimensional finite element electromechanical simulation combined with a drift-diffusion analysis, we analyze the electromechanical switching operation of miniaturized structures. By shrinking the NEM floating gate length from 1000 to 100 nm, the switching (set/reset) voltage reduces from 7.2 to 2.8 V, switching time from 63 to 4.6 ns, power consumption from 16.9 to 0.13 fJ. This indicates the advantage of fast and low-power memory characteristics.

    Original languageEnglish
    Pages (from-to)443041-443045
    Number of pages5
    JournalJapanese journal of applied physics
    Volume49
    Issue number4 PART 1
    DOIs
    Publication statusPublished - 2010 Apr 1

    ASJC Scopus subject areas

    • Engineering(all)
    • Physics and Astronomy(all)

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  • Cite this

    Nagami, T., Tsuchiya, Y., Uchida, K., Mizuta, H., & Oda, S. (2010). Scaling analysis of nanoelectromechanical memory devices. Japanese journal of applied physics, 49(4 PART 1), 443041-443045. https://doi.org/10.1143/JJAP.49.044304