Si nanodevices for random number generating circuits for cryptographic security

S. Fujita, K. Uchida, S. Yasuda, R. Ohba, H. Nozaki, T. Tanamoto

    Research output: Contribution to journalConference article

    1 Citation (Scopus)

    Abstract

    Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.

    Original languageEnglish
    Pages (from-to)238-239+550
    JournalDigest of Technical Papers - IEEE International Solid-State Circuits Conference
    Volume47
    Publication statusPublished - 2003 Dec 1
    EventDigest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement - San Francisco, CA., United States
    Duration: 2003 Feb 152003 Feb 19

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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