Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.
|Journal||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|Publication status||Published - 2004 Jun 2|
|Event||Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference - San Francisco, CA., United States|
Duration: 2003 Feb 15 → 2003 Feb 19
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering