Abstract
MOS memory device with silicon nano-crystals based floating gate on very narrow channel has been fabricated. Large threshold voltage shifts of up to 1 V are obtained by applying small electric field to the tunneling oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.
| Original language | English |
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| Pages | 838-841 |
| Number of pages | 4 |
| Publication status | Published - 1998 |
| Externally published | Yes |
| Event | Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China Duration: 1998 Oct 21 → 1998 Oct 23 |
Other
| Other | Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology |
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| City | Beijing, China |
| Period | 98/10/21 → 98/10/23 |
ASJC Scopus subject areas
- Engineering(all)