Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics

Y. Shi, S. L. Gu, X. L. Yuan, Y. D. Zheng, K. Saito, Hiroki Ishikuro, T. Hiramoto

Research output: Chapter in Book/Report/Conference proceedingChapter

8 Citations (Scopus)

Abstract

MOS memory device with silicon nano-crystals based floating gate on very narrow channel has been fabricated. Large threshold voltage shifts of up to 1 V are obtained by applying small electric field to the tunneling oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.

Original languageEnglish
Title of host publicationInternational Conference on Solid-State and Integrated Circuit Technology Proceedings
PublisherIEEE
Pages838-841
Number of pages4
Publication statusPublished - 1998
Externally publishedYes
EventProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China
Duration: 1998 Oct 211998 Oct 23

Other

OtherProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology
CityBeijing, China
Period98/10/2198/10/23

Fingerprint

Threshold voltage
Diodes
Electric fields
Annealing
Data storage equipment
Silicon
Defects
Crystals
Oxides
Hot Temperature

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Shi, Y., Gu, S. L., Yuan, X. L., Zheng, Y. D., Saito, K., Ishikuro, H., & Hiramoto, T. (1998). Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics. In International Conference on Solid-State and Integrated Circuit Technology Proceedings (pp. 838-841). IEEE.

Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics. / Shi, Y.; Gu, S. L.; Yuan, X. L.; Zheng, Y. D.; Saito, K.; Ishikuro, Hiroki; Hiramoto, T.

International Conference on Solid-State and Integrated Circuit Technology Proceedings. IEEE, 1998. p. 838-841.

Research output: Chapter in Book/Report/Conference proceedingChapter

Shi, Y, Gu, SL, Yuan, XL, Zheng, YD, Saito, K, Ishikuro, H & Hiramoto, T 1998, Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics. in International Conference on Solid-State and Integrated Circuit Technology Proceedings. IEEE, pp. 838-841, Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, 98/10/21.
Shi Y, Gu SL, Yuan XL, Zheng YD, Saito K, Ishikuro H et al. Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics. In International Conference on Solid-State and Integrated Circuit Technology Proceedings. IEEE. 1998. p. 838-841
Shi, Y. ; Gu, S. L. ; Yuan, X. L. ; Zheng, Y. D. ; Saito, K. ; Ishikuro, Hiroki ; Hiramoto, T. / Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics. International Conference on Solid-State and Integrated Circuit Technology Proceedings. IEEE, 1998. pp. 838-841
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