MOS memory device with silicon nano-crystals based floating gate on very narrow channel has been fabricated. Large threshold voltage shifts of up to 1 V are obtained by applying small electric field to the tunneling oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.
|Number of pages||4|
|Publication status||Published - 1998 Dec 1|
|Event||Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China|
Duration: 1998 Oct 21 → 1998 Oct 23
|Other||Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology|
|Period||98/10/21 → 98/10/23|
ASJC Scopus subject areas