SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture

Masashi Sasahara, Jun Terada, Luo Zhou, Kalidou Gaye, Jun Ichi Yamato, Satoshi Ogura, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and also solves the pin-limitation problem. Here, design, implementation, and evaluation of a multiprocessor prototype called SNAIL with the SSS-MIN are presented. The heart of SNAIL is the prototype 1 μ CMOS SSS-MIN gate array chip which exchanges packets from 16 inputs with 50MHz clock. The message combining is implemented only with 20% increases of the hardware. From the empirical evaluation with some application programs, it appears that the latency and synchronization overhead of the SSSMIN are tolerable, and the bandwidth of the SSS-MIN is sufficient. Although the performance improvement with the bit serial message combine is not so large (1%) when instructions are stored in the local memory, it becomes up to 400% when instructions are stored in the shared memory.

Original languageEnglish
Title of host publicationProceedings of the 1994 International Conference on Parallel Processing, ICPP 1994
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesI117-I120
ISBN (Print)0849324939, 9780849324932
DOIs
Publication statusPublished - 1994 Jan 1
Event23rd International Conference on Parallel Processing, ICPP 1994 - Raleigh, NC, United States
Duration: 1994 Aug 151994 Aug 19

Publication series

NameProceedings of the International Conference on Parallel Processing
Volume1
ISSN (Print)0190-3918

Other

Other23rd International Conference on Parallel Processing, ICPP 1994
CountryUnited States
CityRaleigh, NC
Period94/8/1594/8/19

ASJC Scopus subject areas

  • Software
  • Mathematics(all)
  • Hardware and Architecture

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    Sasahara, M., Terada, J., Zhou, L., Gaye, K., Yamato, J. I., Ogura, S., & Amano, H. (1994). SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture. In Proceedings of the 1994 International Conference on Parallel Processing, ICPP 1994 (pp. I117-I120). [4115704] (Proceedings of the International Conference on Parallel Processing; Vol. 1). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICPP.1994.182