Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique

A. Kinoshita, Y. Tsuchiya, A. Yagishita, Ken Uchida, J. Koga

Research output: Chapter in Book/Report/Conference proceedingConference contribution

129 Citations (Scopus)

Abstract

A novel approach for achieving high-performance Schottky-source/drain MOSFETs (SBTs: Schottky Barrier Transistors) is proposed. The dopant segregation (DS) technique is employed and significant modulation of Schottky barrier height is demonstrated. The DS-SBT fabricated with the current CoSi2 process show competitive drive current and better short-channel-effect immunity, compared to the conventional MOSFET. In conclusion, the DS-Schottky junction is useful for the source/drain of advanced MOSFETs.

Original languageEnglish
Title of host publicationDigest of Technical Papers - Symposium on VLSI Technology
Pages168-169
Number of pages2
Publication statusPublished - 2004
Externally publishedYes
Event2004 Symposium on VLSI Technology - Digest of Technical Papers - Honolulu, HI, United States
Duration: 2004 Jun 152004 Jun 17

Other

Other2004 Symposium on VLSI Technology - Digest of Technical Papers
CountryUnited States
CityHonolulu, HI
Period04/6/1504/6/17

Fingerprint

Doping (additives)
Transistors
Modulation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Kinoshita, A., Tsuchiya, Y., Yagishita, A., Uchida, K., & Koga, J. (2004). Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique. In Digest of Technical Papers - Symposium on VLSI Technology (pp. 168-169)

Solution for high-performance Schottky-source/drain MOSFETs : Schottky barrier height engineering with dopant segregation technique. / Kinoshita, A.; Tsuchiya, Y.; Yagishita, A.; Uchida, Ken; Koga, J.

Digest of Technical Papers - Symposium on VLSI Technology. 2004. p. 168-169.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kinoshita, A, Tsuchiya, Y, Yagishita, A, Uchida, K & Koga, J 2004, Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique. in Digest of Technical Papers - Symposium on VLSI Technology. pp. 168-169, 2004 Symposium on VLSI Technology - Digest of Technical Papers, Honolulu, HI, United States, 04/6/15.
Kinoshita A, Tsuchiya Y, Yagishita A, Uchida K, Koga J. Solution for high-performance Schottky-source/drain MOSFETs: Schottky barrier height engineering with dopant segregation technique. In Digest of Technical Papers - Symposium on VLSI Technology. 2004. p. 168-169
Kinoshita, A. ; Tsuchiya, Y. ; Yagishita, A. ; Uchida, Ken ; Koga, J. / Solution for high-performance Schottky-source/drain MOSFETs : Schottky barrier height engineering with dopant segregation technique. Digest of Technical Papers - Symposium on VLSI Technology. 2004. pp. 168-169
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