SPICE-based performance analysis of trigate silicon nanowire CMOS circuits

Chika Tanaka, Masumi Saitoh, Kensuke Ota, Ken Uchida, Toshinori Numata

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

An ultralow-voltage performance is investigated in nanowire transistors (NW Tr.) CMOS circuits. SPICE model parameters of BSIM4 are extracted from measurement data of NW Tr. fabricated on 300-mm SOI wafer. The delay time and the power consumption are examined between nanowire and bulk-Si CMOS circuits. The operation voltage of a nanowire CMOS inverter with an ideal subthreshold slope can be reduced by 300 mV from that of the bulk-Si CMOS inverter. NW-Tr.-based circuits under voltage scaling have immunity from supplying voltage fluctuation and suppression of operation delay variation.

Original languageEnglish
Article number6471797
Pages (from-to)1451-1456
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume60
Issue number4
DOIs
Publication statusPublished - 2013

Fingerprint

SPICE
Silicon
Nanowires
Networks (circuits)
Transistors
Electric potential
Time delay
Electric power utilization

Keywords

  • CMOS circuit
  • low power
  • nanowire transistor
  • parameter extraction
  • SPICE parameter

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

SPICE-based performance analysis of trigate silicon nanowire CMOS circuits. / Tanaka, Chika; Saitoh, Masumi; Ota, Kensuke; Uchida, Ken; Numata, Toshinori.

In: IEEE Transactions on Electron Devices, Vol. 60, No. 4, 6471797, 2013, p. 1451-1456.

Research output: Contribution to journalArticle

Tanaka, C, Saitoh, M, Ota, K, Uchida, K & Numata, T 2013, 'SPICE-based performance analysis of trigate silicon nanowire CMOS circuits', IEEE Transactions on Electron Devices, vol. 60, no. 4, 6471797, pp. 1451-1456. https://doi.org/10.1109/TED.2013.2247607
Tanaka, Chika ; Saitoh, Masumi ; Ota, Kensuke ; Uchida, Ken ; Numata, Toshinori. / SPICE-based performance analysis of trigate silicon nanowire CMOS circuits. In: IEEE Transactions on Electron Devices. 2013 ; Vol. 60, No. 4. pp. 1451-1456.
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