Tandem-crosspoint ATM switch architecture and its cost-effective expansion

Eiji Oki, Naoaki Yamanaka, Seisho Yasukawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper proposes a high-speed input and output buffering ATM switch, named the Tandem-Crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at all crosspoints. The TDXP switch architecture offers several advantages. First, the TDXP switch does not increase the internal line speed in eliminating Head-Of-Line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require the cell sequences to be rebuilt at output buffers using time stamps, as is required by a parallel switch. These merits make it easy to implement a high-speed ATM switch. Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput. In addition, we discuss how TDXP switches can be combined to form larger switches in a cost-effective way. We clarify the relative advantages of the crossbar switch configuration and the three-stage Clos switch configuration in achieving a specific throughput. Because the three-stage Clos switch configuration is not strictly non-blocking, we introduce a nearly non-blocking condition and evaluate switch throughput under the condition. The evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.

Original languageEnglish
Title of host publicationIEEE International Workshop on Broadband Switching Systems, Proceedings, BSS
PublisherIEEE
Pages45-51
Number of pages7
Publication statusPublished - 1997
Externally publishedYes
EventProceedings of the 1997 2nd IEEE International Workshop on Broadband Switching Systems, BSS'97 - Taipei, China
Duration: 1997 Dec 21997 Dec 4

Other

OtherProceedings of the 1997 2nd IEEE International Workshop on Broadband Switching Systems, BSS'97
CityTaipei, China
Period97/12/297/12/4

Fingerprint

Automatic teller machines
Switches
Costs
Throughput

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Oki, E., Yamanaka, N., & Yasukawa, S. (1997). Tandem-crosspoint ATM switch architecture and its cost-effective expansion. In IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS (pp. 45-51). IEEE.

Tandem-crosspoint ATM switch architecture and its cost-effective expansion. / Oki, Eiji; Yamanaka, Naoaki; Yasukawa, Seisho.

IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS. IEEE, 1997. p. 45-51.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Oki, E, Yamanaka, N & Yasukawa, S 1997, Tandem-crosspoint ATM switch architecture and its cost-effective expansion. in IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS. IEEE, pp. 45-51, Proceedings of the 1997 2nd IEEE International Workshop on Broadband Switching Systems, BSS'97, Taipei, China, 97/12/2.
Oki E, Yamanaka N, Yasukawa S. Tandem-crosspoint ATM switch architecture and its cost-effective expansion. In IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS. IEEE. 1997. p. 45-51
Oki, Eiji ; Yamanaka, Naoaki ; Yasukawa, Seisho. / Tandem-crosspoint ATM switch architecture and its cost-effective expansion. IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS. IEEE, 1997. pp. 45-51
@inproceedings{7b484270c5504bc7a08d4937fd578a9d,
title = "Tandem-crosspoint ATM switch architecture and its cost-effective expansion",
abstract = "This paper proposes a high-speed input and output buffering ATM switch, named the Tandem-Crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at all crosspoints. The TDXP switch architecture offers several advantages. First, the TDXP switch does not increase the internal line speed in eliminating Head-Of-Line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require the cell sequences to be rebuilt at output buffers using time stamps, as is required by a parallel switch. These merits make it easy to implement a high-speed ATM switch. Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput. In addition, we discuss how TDXP switches can be combined to form larger switches in a cost-effective way. We clarify the relative advantages of the crossbar switch configuration and the three-stage Clos switch configuration in achieving a specific throughput. Because the three-stage Clos switch configuration is not strictly non-blocking, we introduce a nearly non-blocking condition and evaluate switch throughput under the condition. The evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.",
author = "Eiji Oki and Naoaki Yamanaka and Seisho Yasukawa",
year = "1997",
language = "English",
pages = "45--51",
booktitle = "IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS",
publisher = "IEEE",

}

TY - GEN

T1 - Tandem-crosspoint ATM switch architecture and its cost-effective expansion

AU - Oki, Eiji

AU - Yamanaka, Naoaki

AU - Yasukawa, Seisho

PY - 1997

Y1 - 1997

N2 - This paper proposes a high-speed input and output buffering ATM switch, named the Tandem-Crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at all crosspoints. The TDXP switch architecture offers several advantages. First, the TDXP switch does not increase the internal line speed in eliminating Head-Of-Line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require the cell sequences to be rebuilt at output buffers using time stamps, as is required by a parallel switch. These merits make it easy to implement a high-speed ATM switch. Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput. In addition, we discuss how TDXP switches can be combined to form larger switches in a cost-effective way. We clarify the relative advantages of the crossbar switch configuration and the three-stage Clos switch configuration in achieving a specific throughput. Because the three-stage Clos switch configuration is not strictly non-blocking, we introduce a nearly non-blocking condition and evaluate switch throughput under the condition. The evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.

AB - This paper proposes a high-speed input and output buffering ATM switch, named the Tandem-Crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at all crosspoints. The TDXP switch architecture offers several advantages. First, the TDXP switch does not increase the internal line speed in eliminating Head-Of-Line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require the cell sequences to be rebuilt at output buffers using time stamps, as is required by a parallel switch. These merits make it easy to implement a high-speed ATM switch. Numerical results show that the TDXP switch can effectively eliminate HOL blocking and achieve high throughput. In addition, we discuss how TDXP switches can be combined to form larger switches in a cost-effective way. We clarify the relative advantages of the crossbar switch configuration and the three-stage Clos switch configuration in achieving a specific throughput. Because the three-stage Clos switch configuration is not strictly non-blocking, we introduce a nearly non-blocking condition and evaluate switch throughput under the condition. The evaluation shows that crossbar switch configuration becomes more cost effective as the throughput of individual switch LSIs, which depends on device technologies, increases.

UR - http://www.scopus.com/inward/record.url?scp=0030635340&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030635340&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0030635340

SP - 45

EP - 51

BT - IEEE International Workshop on Broadband Switching Systems, Proceedings, BSS

PB - IEEE

ER -