Third-order phase-locked loops using dual loops inserting an active filter in the second loop with improved stability

Minoru Kamata, Takashi Shono, Takahiko Saba, Iwao Sasase, Shinsaku Mori

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

In fast mobile communication systems, a phase-locked loop (PLL) should track the signal not only with the frequency step transition but also with the frequency ramp transition caused by Doppler shift. In such an environment, since a perfect second-order PLL cannot suppress the steady-state phase error, a perfect third-order PLL is required. However, the third-order PLL using an active filter cannot be used in the low S/N environment because the PLL with small loop gain becomes unstable. One of the solutions is a third-order digital PLL using dual loops. However, since the PLL is implemented by digital equipment and is limited by the operational frequency, it cannot be used in a high-frequency band employed in satellite communication. Downconverting of the operational frequency restricts the acquisition speed. Furthermore, the recomposing of the PLL with analog equipment causes the gain imbalance of the voltage-controlled oscillator (VCO) and the PLL cannot synchronize. In this paper, we propose a new third-order PLL using dual loops inserting an active filter in the second loop, which can be implemented by analog equipment. First, we show the closed loop transfer function of the proposed PLL and investigate the steady-state phase error by linear analysis. Second, we show that the proposed PLL is always stable regardless of the value of loop gain. Third, we evaluate the transient response and show the proposed PLL has acquisition time shorter than the perfect third-order PLL. Next, we show that the steady-state phase error of the proposed PLL can be suppressed to the same level of the perfect third-order PLL. Finally, we investigate the effect of noise in PLLS, and show the proposed PLL has better jitter performance than the perfect third-order PLL.

Fingerprint

Active filters
Phase locked loops
Mobile telecommunication systems
Doppler effect
Variable frequency oscillators
Communication satellites

Keywords

  • Frequency ramp transition
  • Phase-locked loop
  • Stability
  • Steady-state phase error

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

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title = "Third-order phase-locked loops using dual loops inserting an active filter in the second loop with improved stability",
abstract = "In fast mobile communication systems, a phase-locked loop (PLL) should track the signal not only with the frequency step transition but also with the frequency ramp transition caused by Doppler shift. In such an environment, since a perfect second-order PLL cannot suppress the steady-state phase error, a perfect third-order PLL is required. However, the third-order PLL using an active filter cannot be used in the low S/N environment because the PLL with small loop gain becomes unstable. One of the solutions is a third-order digital PLL using dual loops. However, since the PLL is implemented by digital equipment and is limited by the operational frequency, it cannot be used in a high-frequency band employed in satellite communication. Downconverting of the operational frequency restricts the acquisition speed. Furthermore, the recomposing of the PLL with analog equipment causes the gain imbalance of the voltage-controlled oscillator (VCO) and the PLL cannot synchronize. In this paper, we propose a new third-order PLL using dual loops inserting an active filter in the second loop, which can be implemented by analog equipment. First, we show the closed loop transfer function of the proposed PLL and investigate the steady-state phase error by linear analysis. Second, we show that the proposed PLL is always stable regardless of the value of loop gain. Third, we evaluate the transient response and show the proposed PLL has acquisition time shorter than the perfect third-order PLL. Next, we show that the steady-state phase error of the proposed PLL can be suppressed to the same level of the perfect third-order PLL. Finally, we investigate the effect of noise in PLLS, and show the proposed PLL has better jitter performance than the perfect third-order PLL.",
keywords = "Frequency ramp transition, Phase-locked loop, Stability, Steady-state phase error",
author = "Minoru Kamata and Takashi Shono and Takahiko Saba and Iwao Sasase and Shinsaku Mori",
year = "2001",
doi = "10.1002/1520-6440(200106)84:6<75::AID-ECJC8>3.0.CO;2-C",
language = "English",
volume = "84",
pages = "75--84",
journal = "Electronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)",
issn = "1042-0967",
publisher = "John Wiley and Sons Inc.",
number = "6",

}

TY - JOUR

T1 - Third-order phase-locked loops using dual loops inserting an active filter in the second loop with improved stability

AU - Kamata, Minoru

AU - Shono, Takashi

AU - Saba, Takahiko

AU - Sasase, Iwao

AU - Mori, Shinsaku

PY - 2001

Y1 - 2001

N2 - In fast mobile communication systems, a phase-locked loop (PLL) should track the signal not only with the frequency step transition but also with the frequency ramp transition caused by Doppler shift. In such an environment, since a perfect second-order PLL cannot suppress the steady-state phase error, a perfect third-order PLL is required. However, the third-order PLL using an active filter cannot be used in the low S/N environment because the PLL with small loop gain becomes unstable. One of the solutions is a third-order digital PLL using dual loops. However, since the PLL is implemented by digital equipment and is limited by the operational frequency, it cannot be used in a high-frequency band employed in satellite communication. Downconverting of the operational frequency restricts the acquisition speed. Furthermore, the recomposing of the PLL with analog equipment causes the gain imbalance of the voltage-controlled oscillator (VCO) and the PLL cannot synchronize. In this paper, we propose a new third-order PLL using dual loops inserting an active filter in the second loop, which can be implemented by analog equipment. First, we show the closed loop transfer function of the proposed PLL and investigate the steady-state phase error by linear analysis. Second, we show that the proposed PLL is always stable regardless of the value of loop gain. Third, we evaluate the transient response and show the proposed PLL has acquisition time shorter than the perfect third-order PLL. Next, we show that the steady-state phase error of the proposed PLL can be suppressed to the same level of the perfect third-order PLL. Finally, we investigate the effect of noise in PLLS, and show the proposed PLL has better jitter performance than the perfect third-order PLL.

AB - In fast mobile communication systems, a phase-locked loop (PLL) should track the signal not only with the frequency step transition but also with the frequency ramp transition caused by Doppler shift. In such an environment, since a perfect second-order PLL cannot suppress the steady-state phase error, a perfect third-order PLL is required. However, the third-order PLL using an active filter cannot be used in the low S/N environment because the PLL with small loop gain becomes unstable. One of the solutions is a third-order digital PLL using dual loops. However, since the PLL is implemented by digital equipment and is limited by the operational frequency, it cannot be used in a high-frequency band employed in satellite communication. Downconverting of the operational frequency restricts the acquisition speed. Furthermore, the recomposing of the PLL with analog equipment causes the gain imbalance of the voltage-controlled oscillator (VCO) and the PLL cannot synchronize. In this paper, we propose a new third-order PLL using dual loops inserting an active filter in the second loop, which can be implemented by analog equipment. First, we show the closed loop transfer function of the proposed PLL and investigate the steady-state phase error by linear analysis. Second, we show that the proposed PLL is always stable regardless of the value of loop gain. Third, we evaluate the transient response and show the proposed PLL has acquisition time shorter than the perfect third-order PLL. Next, we show that the steady-state phase error of the proposed PLL can be suppressed to the same level of the perfect third-order PLL. Finally, we investigate the effect of noise in PLLS, and show the proposed PLL has better jitter performance than the perfect third-order PLL.

KW - Frequency ramp transition

KW - Phase-locked loop

KW - Stability

KW - Steady-state phase error

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VL - 84

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JO - Electronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)

JF - Electronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)

SN - 1042-0967

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ER -