Three-dimensional stress engineering in FinFETs for mobility/on-current enhancement and gate current reduction

Masumi Saitoh, Akio Kaneko, Kimitoshi Okano, Tomoko Kinoshita, Satoshi Inaba, Yoshiaki Toyoshima, Ken Uchida

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    20 Citations (Scopus)

    Abstract

    In this paper, the first systematic study of uniaxial stress effects on mobility (μ)/on-current (Ion) enhancement and gate current (I g) reduction in FinFETs is described. We demonstrate for the first time that Ig of (110) side-surface pFinFETs is largely reduced by longitudinal compressive stress due to out-of-plane mass increase. (110) n/pFinFETs are superior to (100) FinFETs in terms of higher μ/Ion enhancement ratio by longitudinal strain and comparable/ higher short-channel Idsat. Three-dimensional stress design in FinFETs including transverse and vertical stresses is proposed based on the understanding of stress effects beyond bulk piezoresistance.

    Original languageEnglish
    Title of host publication2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
    Pages18-19
    Number of pages2
    DOIs
    Publication statusPublished - 2008 Sep 23
    Event2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT - Honolulu, HI, United States
    Duration: 2008 Jun 172008 Jun 19

    Publication series

    NameDigest of Technical Papers - Symposium on VLSI Technology
    ISSN (Print)0743-1562

    Other

    Other2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT
    CountryUnited States
    CityHonolulu, HI
    Period08/6/1708/6/19

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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  • Cite this

    Saitoh, M., Kaneko, A., Okano, K., Kinoshita, T., Inaba, S., Toyoshima, Y., & Uchida, K. (2008). Three-dimensional stress engineering in FinFETs for mobility/on-current enhancement and gate current reduction. In 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT (pp. 18-19). [4588547] (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2008.4588547