Abstract
This paper presents work on integrating wireless 3-D interconnection interface, namely ThruChip Interface (TCI), in three-dimensional field-programmable gate array (3-D FPGA) exploration tool (TPR). TCI is an emerging 3-D IC integration solution because of its advantages over cost, flexibility, reliability, comparable performance, and energy dissipation in comparison to through-silicon-via (TSV). Since the communication bandwidth of TCI is much higher than FPGA internal logic signals, in order to fully utilize its bandwidth, the time-division multiplexing (TDM) scheme is adopted. The experimental results show 25% on average and 58% at maximum path delay reduction over 2-D FPGA when five layers are used in TCI based 3-D FPGA architecture. Although the performance of TCI based 3-D FPGA architecture is 8% below that of TSV based 3-D FPGA on average, TCI based architecture can reduce active area consumed by vertical communication channels by 42% on average in comparison to TSV based architecture and hence leads to better delay and area product.
| Original language | English |
|---|---|
| Pages (from-to) | 288-297 |
| Number of pages | 10 |
| Journal | IEICE Transactions on Electronics |
| Volume | E98C |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - 2015 Apr 1 |
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Keywords
- 3-DFPGA
- FPGA
- TCI
- ThruChip
- TPR
- TSV
- VPR
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
Cite this
Through chip interface based three-dimensional FPGA architecture exploration. / Hsu, Li Chung; Motomura, Masato; Take, Yasuhiro; Kuroda, Tadahiro.
In: IEICE Transactions on Electronics, Vol. E98C, No. 4, 01.04.2015, p. 288-297.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Through chip interface based three-dimensional FPGA architecture exploration
AU - Hsu, Li Chung
AU - Motomura, Masato
AU - Take, Yasuhiro
AU - Kuroda, Tadahiro
PY - 2015/4/1
Y1 - 2015/4/1
N2 - This paper presents work on integrating wireless 3-D interconnection interface, namely ThruChip Interface (TCI), in three-dimensional field-programmable gate array (3-D FPGA) exploration tool (TPR). TCI is an emerging 3-D IC integration solution because of its advantages over cost, flexibility, reliability, comparable performance, and energy dissipation in comparison to through-silicon-via (TSV). Since the communication bandwidth of TCI is much higher than FPGA internal logic signals, in order to fully utilize its bandwidth, the time-division multiplexing (TDM) scheme is adopted. The experimental results show 25% on average and 58% at maximum path delay reduction over 2-D FPGA when five layers are used in TCI based 3-D FPGA architecture. Although the performance of TCI based 3-D FPGA architecture is 8% below that of TSV based 3-D FPGA on average, TCI based architecture can reduce active area consumed by vertical communication channels by 42% on average in comparison to TSV based architecture and hence leads to better delay and area product.
AB - This paper presents work on integrating wireless 3-D interconnection interface, namely ThruChip Interface (TCI), in three-dimensional field-programmable gate array (3-D FPGA) exploration tool (TPR). TCI is an emerging 3-D IC integration solution because of its advantages over cost, flexibility, reliability, comparable performance, and energy dissipation in comparison to through-silicon-via (TSV). Since the communication bandwidth of TCI is much higher than FPGA internal logic signals, in order to fully utilize its bandwidth, the time-division multiplexing (TDM) scheme is adopted. The experimental results show 25% on average and 58% at maximum path delay reduction over 2-D FPGA when five layers are used in TCI based 3-D FPGA architecture. Although the performance of TCI based 3-D FPGA architecture is 8% below that of TSV based 3-D FPGA on average, TCI based architecture can reduce active area consumed by vertical communication channels by 42% on average in comparison to TSV based architecture and hence leads to better delay and area product.
KW - 3-DFPGA
KW - FPGA
KW - TCI
KW - ThruChip
KW - TPR
KW - TSV
KW - VPR
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U2 - 10.1587/transele.E98.C.288
DO - 10.1587/transele.E98.C.288
M3 - Article
AN - SCOPUS:84926476110
VL - E98C
SP - 288
EP - 297
JO - IEICE Transactions on Electronics
JF - IEICE Transactions on Electronics
SN - 0916-8524
IS - 4
ER -