Thruchip interface for heterogeneous chip stacking

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a wireless inter-chip link using inductive coupling, namely ThruChip Interface (TCI). TCI is a digital CMOS circuit solution in a standard CMOS technology. It is much less expensive than TSV (Through Silicon Via) but bears comparison in performance. Delay time and energy dissipation will scale down by scaling device size and chip thickness. As the inductive coupling enables interface among chips under different supply voltages, TCI is suitable for heterogeneous integration. A 90nm 8- core processor under 1.0V power supply and two 65nm SRAM's under 1.2V power supply are stacked and AC-coupled by TCI at 19.2Gb/s. Power dissipation and area efficiency of the link is 1pJ/b and 0.15mm2/Gbps respectively, which is 1/30 and 1/3 in comparison with the conventional DDR2 interface.

Original languageEnglish
Title of host publicationInternational Symposium on Functional Diversification of Semiconductor Electronics
Pages63-68
Number of pages6
Edition14
DOIs
Publication statusPublished - 2012 Dec 1
EventSymposium on More than Moore - 222nd ECS Meeting/PRiME 2012 - Honolulu, HI, United States
Duration: 2012 Oct 72012 Oct 12

Publication series

NameECS Transactions
Number14
Volume50
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherSymposium on More than Moore - 222nd ECS Meeting/PRiME 2012
CountryUnited States
CityHonolulu, HI
Period12/10/712/10/12

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Kuroda, T. (2012). Thruchip interface for heterogeneous chip stacking. In International Symposium on Functional Diversification of Semiconductor Electronics (14 ed., pp. 63-68). (ECS Transactions; Vol. 50, No. 14). https://doi.org/10.1149/05014.0063ecst