TMR METHOD FOR IMPROVING YIELD OF LARGE MEMORY CHIPS.

Yoshiyasu Takefuji, Yoshihiko Adachi, Hideo Aiso

Research output: Contribution to journalArticle

Abstract

The yield of chips tends to decrease with the degree of integration of memory chips, which is presently a serious problem. A method is proposed to utilize the fault chips being discarded to produce a normal chip, increasing the apparent yield. The relation between the yield and the reliability of the fault memory chip system is discussed. Using the proposed method, the yield of 10% can be improved up to 40% without substantially decreasing the reliability of the fault chip memory system from that of a normal memory chip. The method was implemented using fault 16 K RAM, and the effectiveness of the method was verified.

Original languageEnglish
Pages (from-to)47-53
Number of pages7
JournalSystems, computers, controls
Volume13
Issue number1
Publication statusPublished - 1982 Jan 1

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ASJC Scopus subject areas

  • Engineering(all)

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