TORUS

Terabit-per-second ATM switching system architecture based on distributed internal speed-up ATM switch

Kouichi Genda, Naoaki Yamanaka

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4 × 2 switch module using optical interconnection technology and very high-speed crosspoint LSI's, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch.

Original languageEnglish
Pages (from-to)817-828
Number of pages12
JournalIEEE Journal on Selected Areas in Communications
Volume15
Issue number5
DOIs
Publication statusPublished - 1997 Jun
Externally publishedYes

Fingerprint

Switching systems
Automatic teller machines
Switches
Optical interconnects
Multichip modules
Synchronization
Networks (circuits)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Networks and Communications

Cite this

@article{ec6e3075e01e469fad743aabfe23c97f,
title = "TORUS: Terabit-per-second ATM switching system architecture based on distributed internal speed-up ATM switch",
abstract = "A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4 × 2 switch module using optical interconnection technology and very high-speed crosspoint LSI's, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch.",
author = "Kouichi Genda and Naoaki Yamanaka",
year = "1997",
month = "6",
doi = "10.1109/49.594844",
language = "English",
volume = "15",
pages = "817--828",
journal = "IEEE Journal on Selected Areas in Communications",
issn = "0733-8716",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "5",

}

TY - JOUR

T1 - TORUS

T2 - Terabit-per-second ATM switching system architecture based on distributed internal speed-up ATM switch

AU - Genda, Kouichi

AU - Yamanaka, Naoaki

PY - 1997/6

Y1 - 1997/6

N2 - A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4 × 2 switch module using optical interconnection technology and very high-speed crosspoint LSI's, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch.

AB - A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4 × 2 switch module using optical interconnection technology and very high-speed crosspoint LSI's, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch.

UR - http://www.scopus.com/inward/record.url?scp=0031168805&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031168805&partnerID=8YFLogxK

U2 - 10.1109/49.594844

DO - 10.1109/49.594844

M3 - Article

VL - 15

SP - 817

EP - 828

JO - IEEE Journal on Selected Areas in Communications

JF - IEEE Journal on Selected Areas in Communications

SN - 0733-8716

IS - 5

ER -