Trax Solver on Zynq using incremental update algorithm

Hiroshi Nakahara, Tetsui Ohkubo, Hideki Shimura, Ryotaro Sakai, Chiharu Tsuruta, Takahiro Kaneda, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a software/hardware co-design system for a Trax solver. Since development with Hardware Description Language (HDL) is tough work, we selected an approach: 1. writing C++ code, 2. finding bottleneck of the problem, and 3. re-writing the bottleneck part in the High Level Synthesis(HLS). Generally, game AI algorithm is divided into 3 parts, data structure, searching, and board evaluation. In this design, we focused on the data structure and implemented an incremental update algorithm. As a result, we can detect a line and an attack with O(1). Also, we implemented a local pruning, which reduces search area when the search depth becomes large in alpha beta tree search. The implemented solver works with 150MHz clock on Xilinx XC7Z020-CLG484 of Digilent ZedBoard.

Original languageEnglish
Title of host publicationProceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages323-326
Number of pages4
ISBN (Electronic)9781509056026
DOIs
Publication statusPublished - 2017 May 15
Event15th International Conference on Field-Programmable Technology, FPT 2016 - Xi'an, China
Duration: 2016 Dec 72016 Dec 9

Other

Other15th International Conference on Field-Programmable Technology, FPT 2016
CountryChina
CityXi'an
Period16/12/716/12/9

Fingerprint

data structures
Data structures
hardware description languages
Computer hardware description languages
games
systems engineering
clocks
attack
Clocks
hardware
computer programs
Hardware
evaluation
synthesis
High level synthesis

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Instrumentation
  • Hardware and Architecture

Cite this

Nakahara, H., Ohkubo, T., Shimura, H., Sakai, R., Tsuruta, C., Kaneda, T., & Amano, H. (2017). Trax Solver on Zynq using incremental update algorithm. In Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016 (pp. 323-326). [7929564] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPT.2016.7929564

Trax Solver on Zynq using incremental update algorithm. / Nakahara, Hiroshi; Ohkubo, Tetsui; Shimura, Hideki; Sakai, Ryotaro; Tsuruta, Chiharu; Kaneda, Takahiro; Amano, Hideharu.

Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 323-326 7929564.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nakahara, H, Ohkubo, T, Shimura, H, Sakai, R, Tsuruta, C, Kaneda, T & Amano, H 2017, Trax Solver on Zynq using incremental update algorithm. in Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016., 7929564, Institute of Electrical and Electronics Engineers Inc., pp. 323-326, 15th International Conference on Field-Programmable Technology, FPT 2016, Xi'an, China, 16/12/7. https://doi.org/10.1109/FPT.2016.7929564
Nakahara H, Ohkubo T, Shimura H, Sakai R, Tsuruta C, Kaneda T et al. Trax Solver on Zynq using incremental update algorithm. In Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 323-326. 7929564 https://doi.org/10.1109/FPT.2016.7929564
Nakahara, Hiroshi ; Ohkubo, Tetsui ; Shimura, Hideki ; Sakai, Ryotaro ; Tsuruta, Chiharu ; Kaneda, Takahiro ; Amano, Hideharu. / Trax Solver on Zynq using incremental update algorithm. Proceedings of the 2016 International Conference on Field-Programmable Technology, FPT 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 323-326
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