TY - GEN
T1 - Tutorial
T2 - 2013 1st International Symposium on Computing and Networking, CANDAR 2013
AU - Amano, Hideharu
PY - 2013/12/1
Y1 - 2013/12/1
N2 - Interconnection networks connect cab nets in the floors, boards in a cab net, chips on a board, and moudles inside the chip. Since protcols and network structures are not fixed unlike LAN or WAN, there are wide viriety on topologies, routing, flow control and media. As an introduction of two other tutorial sessions ('Future Low-latency Networks for High Performance Computing' and 'Research Challenges on 2-D and 3-D Network-on-Chips'), typical interconnection networks and techniques around them are explained with recent examples.
AB - Interconnection networks connect cab nets in the floors, boards in a cab net, chips on a board, and moudles inside the chip. Since protcols and network structures are not fixed unlike LAN or WAN, there are wide viriety on topologies, routing, flow control and media. As an introduction of two other tutorial sessions ('Future Low-latency Networks for High Performance Computing' and 'Research Challenges on 2-D and 3-D Network-on-Chips'), typical interconnection networks and techniques around them are explained with recent examples.
KW - Interconnection Networks
UR - http://www.scopus.com/inward/record.url?scp=84894153808&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84894153808&partnerID=8YFLogxK
U2 - 10.1109/CANDAR.2013.9
DO - 10.1109/CANDAR.2013.9
M3 - Conference contribution
AN - SCOPUS:84894153808
SN - 9781479927951
T3 - Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013
SP - 15
EP - 16
BT - Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013
Y2 - 4 December 2013 through 6 December 2013
ER -