TY - GEN
T1 - Vertical link on/off control methods for wireless 3-D NoCs
AU - Zhang, Hao
AU - Matsutani, Hiroki
AU - Take, Yasuhiro
AU - Kuroda, Tadahiro
AU - Amano, Hideharu
PY - 2012/2/28
Y1 - 2012/2/28
N2 - Low-power techniques are proposed for the wireless three-dimensional Network-on-Chips (wireless 3-D NoCs), in which routers on the same chip are connected with metal wires while those on the different chips are connected wirelessly using the inductive-coupling. For saving power consumption of the vertical link, the clock and power supplies to the transmitter are stopped when their utilizations are between a specified range. Meanwhile, the whole wireless vertical link will be shut down when the utilization is lower than the threshold. In order to keep performance, on-demand activation is used in this paper. As long as flit comes, the dormant data transmitter or the whole vertical link will be activated immediately without any judgement. Full-system many-core simulations using power parameters derived from a real chip implementation show that the proposed low-power techniques reduce the power consumption by 23.4%-29.3%, while the performance overhead is less than 2.4%.
AB - Low-power techniques are proposed for the wireless three-dimensional Network-on-Chips (wireless 3-D NoCs), in which routers on the same chip are connected with metal wires while those on the different chips are connected wirelessly using the inductive-coupling. For saving power consumption of the vertical link, the clock and power supplies to the transmitter are stopped when their utilizations are between a specified range. Meanwhile, the whole wireless vertical link will be shut down when the utilization is lower than the threshold. In order to keep performance, on-demand activation is used in this paper. As long as flit comes, the dormant data transmitter or the whole vertical link will be activated immediately without any judgement. Full-system many-core simulations using power parameters derived from a real chip implementation show that the proposed low-power techniques reduce the power consumption by 23.4%-29.3%, while the performance overhead is less than 2.4%.
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U2 - 10.1007/978-3-642-28293-5_18
DO - 10.1007/978-3-642-28293-5_18
M3 - Conference contribution
AN - SCOPUS:84863171063
SN - 9783642282928
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 212
EP - 224
BT - Architecture of Computing Systems, ARCS 2012 - 25th International Conference, Proceedings
T2 - 25th International Conference on Architecture of Computing Systems, ARCS 2012
Y2 - 28 February 2012 through 2 March 2012
ER -