Fast Aerodynamics Routines (FaSTAR) is a state of the art Computational Fluid Dynamics (CFD) software package to enable high precise analysis. Due to its complicated data structure from unstructured grid, the acceleration with GPU or massively parallel machines is not efficient. Although a hardware accelerator on an FPGA is a hopeful candidate, the complicated FaSTAR program is difficult to pick up time consuming cores and implement them on an FPGA. In practical aircraft design, a parametric survey, which executes FaSTAR jobs in parallel with different conditions is commonly used. Here, we propose a Zynq cluster as a cost and power efficient solution of FaSTAR parametric survey. By introducing high-level synthesis and partial reconfiguration, the FaSTAR job with a specific condition runs on a simple node with a Zynq-7000 AP SoC. Now a part of FaSTAR job can be executed on FPGA of Zynq board about 1.3 times faster than Intel’s Xeon E5-2667 2.9GHz software.