• 出典: Scopus
  • Pureの文献数とScopusの被引用数に基づいて算出されます
1983 …2022

年別の研究成果

Pureに変更を加えた場合、すぐここに表示されます。
フィルター
Conference contribution

検索結果

  • 2013

    A speculative gather system for cool mega-array

    Uno, R., Ozaki, N., Isawa, M., Tsusaka, A., Miyajima, T. & Amano, H., 2013 12月 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 346-349 4 p. 6718383. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links

    Zhang, H., Matsutani, H., Koibuchi, M. & Amano, H., 2013 8月 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547924. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • Headfirst sliding routing: A time-based routing scheme for bus-NoC hybrid 3-D architecture

    Kagami, T., Matsutani, H., Koibuchi, M. & Amano, H., 2013, 2013 7th IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2013. 6558406. (2013 7th IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2013).

    研究成果: Conference contribution

    5 被引用数 (Scopus)
  • MCMA: A modular processing elements array based low-power coarse-grained reconfigurable accelerator

    Chaintreuil, R., Uno, R. & Amano, H., 2013 1月 1, 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013. IEEE Computer Society, 6732308. (2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Partially reconfigurable flux calculation scheme in advection term computation

    Talip, M. S. A., Akamine, T., Hatto, M., Osana, Y., Fujita, N. & Amano, H., 2013 12月 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 382-385 4 p. 6718393. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • Research of PE array connection network for cool mega-array

    Uno, R., Ozaki, N. & Amano, H., 2013 8月 19, Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013. p. 144-149 6 p. 6550387. (Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Task level pipelining with PEACH2: An FPGA switching fabric for high performance computing

    Miyajima, T., Kuhara, T., Hanawa, T., Amano, H. & Boku, T., 2013 12月 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 466-469 4 p. 6718416. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Tutorial: Introduction to interconnection networks from system area network to network on chips

    Amano, H., 2013 12月 1, Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. p. 15-16 2 p. 6726871. (Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013).

    研究成果: Conference contribution

    4 被引用数 (Scopus)
  • 2012

    A case for random shortcut topologies for HPC interconnects

    Koibuchi, M., Matsutani, H., Amano, H., Hsu, D. F. & Casanova, H., 2012, 2012 39th Annual International Symposium on Computer Architecture, ISCA 2012. p. 177-188 12 p. 6237016. (Proceedings - International Symposium on Computer Architecture).

    研究成果: Conference contribution

    98 被引用数 (Scopus)
  • A domain specific language and toolchain for OpenCV Runtime Binary Acceleration using GPU

    Miyajima, T., Thomas, D. & Amano, H., 2012 12月 1, Proceedings of the 2012 3rd International Conference on Networking and Computing, ICNC 2012. p. 175-181 7 p. 6424560. (Proceedings of the 2012 3rd International Conference on Networking and Computing, ICNC 2012).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • A multi-Vdd dynamic variable-pipeline on-chip router for CMPs

    Matsutani, H., Hirata, Y., Koibuchi, M., Usami, K., Nakamura, H. & Amano, H., 2012, ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference. p. 407-412 6 p. 6164982. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    研究成果: Conference contribution

    16 被引用数 (Scopus)
  • A study of adaptable co-processors for cyclic redundancy check on an FPGA

    Akagic, A. & Amano, H., 2012 12月 1, FPT 2012 - 2012 International Conference on Field-Programmable Technology. p. 119-124 6 p. 6412122. (FPT 2012 - 2012 International Conference on Field-Programmable Technology).

    研究成果: Conference contribution

    5 被引用数 (Scopus)
  • Castle of chips: A new chip stacking structure with wireless inductive coupling for large scale 3-D multicore systems

    Amano, H., 2012 12月 14, Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012. p. 820-825 6 p. 6354931. (Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012).

    研究成果: Conference contribution

    4 被引用数 (Scopus)
  • CMA-2: The second prototype of a low power reconfigurable accelerator

    Izawa, M., Ozaki, N., Yasuda, Y., Kimura, M. & Amano, H., 2012 4月 26, ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference. p. 471-472 2 p. 6164996. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect

    Koizumi, Y., Sasaki, E., Amano, H., Matsutani, H., Take, Y., Kuroda, T., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2012 12月 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 543-546 4 p. 6339375. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

    研究成果: Conference contribution

    6 被引用数 (Scopus)
  • Cost effective implementation of flux limiter functions using partial reconfiguration

    Abu Talip, M. S., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012, Reconfigurable Computing: Architectures, Tools and Applications - 8th International Symposium, ARC 2012, Proceedings. p. 215-226 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7199 LNCS).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Dynamically reconfigurable flux limiter functions in MUSCL scheme

    Talip, M. S. A., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012 11月 23, ReCoSoC 2012 - 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Proceedings. 6322878. (ReCoSoC 2012 - 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Proceedings).

    研究成果: Conference contribution

  • Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect

    Koizumi, Y., Amano, H., Matsutani, H., Miura, N., Kuroda, T., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2012 12月 1, FPT 2012 - 2012 International Conference on Field-Programmable Technology. p. 293-296 4 p. 6412150. (FPT 2012 - 2012 International Conference on Field-Programmable Technology).

    研究成果: Conference contribution

    7 被引用数 (Scopus)
  • Extension of memory controller equipped with MuCCRA-3-DP: Dynamically reconfigurable processor array

    Katagiri, T., Hironaka, K. & Amano, H., 2012 12月 14, Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012. p. 826-831 6 p. 6354932. (Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • Performance analysis of fully-adaptable CRC accelerators on an FPGA

    Akagic, A. & Amano, H., 2012 12月 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 575-578 4 p. 6339374. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

    研究成果: Conference contribution

  • Reconfigurable out-of-order mechanism generator for unstructured grid computation in computational fluid dynamics

    Akamine, T., Inakagata, K., Osana, Y., Fujita, N. & Amano, H., 2012 12月 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 136-142 7 p. 6339277. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

    研究成果: Conference contribution

    5 被引用数 (Scopus)
  • Trade-off analysis of fine-grained power gating methods for functional units in a CPU

    Wang, W., Ohta, Y., Ishii, Y., Usami, K. & Amano, H., 2012 7月 25, Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV. 6216587. (Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV).

    研究成果: Conference contribution

    6 被引用数 (Scopus)
  • Vertical link on/off control methods for wireless 3-D NoCs

    Zhang, H., Matsutani, H., Take, Y., Kuroda, T. & Amano, H., 2012 2月 28, Architecture of Computing Systems, ARCS 2012 - 25th International Conference, Proceedings. p. 212-224 13 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7179 LNCS).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • 2011

    A 2.72GOPS/11mW low power reconfigurable accelerator with a highly parallel datapath consisting of combinatorial circuits in 65nm CMOS

    Ozaki, N., Yasuda, Y., Saito, Y., Ikebuchi, D., Kimura, M., Amano, H., Nakamura, H., Usami, K., Namiki, M. & Kondo, M., 2011, 2011 International Symposium on Integrated Circuits, ISIC 2011. p. 579-584 6 p. 6131929. (2011 International Symposium on Integrated Circuits, ISIC 2011).

    研究成果: Conference contribution

  • A design of one-dimensional Euler equations for fluid dynamics on FPGA

    Abu Talip, M. S. & Amano, H., 2011, Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011. p. 170-173 4 p. 5960942. (Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • A dynamic link-width optimization for network-on-chip

    Wang, D., Koibuchi, M., Yoneda, T., Matsutani, H. & Amano, H., 2011 12月 1, Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011. p. 106-108 3 p. 602900. (Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011; vol. 2).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • A vertical bubble flow network using inductive-coupling for 3-D CMPs

    Matsutani, H., Take, Y., Sasaki, D., Kimura, M., Ono, Y., Nishiyama, Y., Koibuchi, M., Kuroda, T. & Amano, H., 2011, NOCS 2011: The 5th ACM/IEEE International Symposium on Networks-on-Chip. p. 49-56 8 p. (NOCS 2011: The 5th ACM/IEEE International Symposium on Networks-on-Chip).

    研究成果: Conference contribution

    17 被引用数 (Scopus)
  • Cool mega-array: A highly energy efficient reconfigurable accelerator

    Ozaki, N., Yoshihiro, Y., Saito, Y., Ikebuchi, D., Kimura, M., Amano, H., Nakamura, H., Usami, K., Namiki, M. & Kondo, M., 2011, 2011 International Conference on Field-Programmable Technology, FPT 2011. 6132668. (2011 International Conference on Field-Programmable Technology, FPT 2011).

    研究成果: Conference contribution

    16 被引用数 (Scopus)
  • Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction

    Yamamoto, T., Hironaka, K., Hayakawa, Y., Kimura, M., Amano, H. & Usami, K., 2011, Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Proceedings. p. 230-241 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6578 LNCS).

    研究成果: Conference contribution

    9 被引用数 (Scopus)
  • Geyser-2: The second prototype CPU with fine-grained run-time power gating

    Zhao, L., Ikebuchi, D., Saito, Y., Kamata, M., Seki, N., Kojima, Y., Amano, H., Koyama, S., Hashida, T., Umahashi, Y., Masuda, D., Usami, K., Kimura, K., Namiki, M., Takeda, S., Nakamura, H. & Kondo, M., 2011 3月 28, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 87-88 2 p. 5722310. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    研究成果: Conference contribution

    11 被引用数 (Scopus)
  • On-chip detection methodology for break-even time of power gated function units

    Usami, K., Goto, Y., Matsunaga, K., Koyama, S., Ikebuchi, D., Amano, H. & Nakamura, H., 2011 9月 19, IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011. p. 241-246 6 p. 5993643. (Proceedings of the International Symposium on Low Power Electronics and Design).

    研究成果: Conference contribution

    16 被引用数 (Scopus)
  • Performance evaluation of multiple lookup tables algorithms for generating CRC on an FPGA

    Akagić, A. & Amano, H., 2011 8月 23, Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011. p. 164-169 6 p. 5960941. (Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011).

    研究成果: Conference contribution

    5 被引用数 (Scopus)
  • Performance evaluation of power-aware multi-tree ethernet for HPC interconnects

    Koibuchi, M., Watanabe, T., Minamihata, A., Nakao, M., Hiroyasu, T., Matsutani, H. & Amano, H., 2011, Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011. p. 50-57 8 p. 6131793. (Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • Power centric application mapping for dynamically reconfigurable processor array with Dual Vdd and Dual Vth

    Hironaka, K. & Amano, H., 2011 12月 1, Proceedings - 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011. p. 404-409 6 p. 6128611. (Proceedings - 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • Proposal of auto MPI expansion tool for cell broadband engine cluster

    Nakahama, T., Yamada, M., Yoshimi, M. & Amano, H., 2011, Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011. p. 166-172 7 p. 6131802. (Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011).

    研究成果: Conference contribution

  • Reducing power for dynamically reconfigurable processor array by reducing number of reconfigurations

    Kimura, M., Hironaka, K. & Amano, H., 2011 12月 1, 2011 International Conference on Field-Programmable Technology, FPT 2011. 6132707. (2011 International Conference on Field-Programmable Technology, FPT 2011).

    研究成果: Conference contribution

  • SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator

    Ozaki, N., Usami, K., Amano, H., Namiki, M., Nakamura, H. & Kondo, M., 2011, IEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings. 5890918. (IEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • The realtime image processing demonstration with CMA-1: An ultra low-power reconfigurable accelerator

    Hironaka, K., Ozaki, N. & Amano, H., 2011 12月 1, 2011 International Conference on Field-Programmable Technology, FPT 2011. 6132686. (2011 International Conference on Field-Programmable Technology, FPT 2011).

    研究成果: Conference contribution

  • Time and space-multiplexed compilation challenges for dynamically reconfigurable processors

    Toi, T., Awashima, T., Motomura, M. & Amano, H., 2011 10月 13, 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 6026300. (Midwest Symposium on Circuits and Systems).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • Vegeta: An implementation and evaluation of development-support middleware on multiple OpenCL platform

    Shitara, A., Nakahama, T., Yamada, M., Kamata, T., Nishikawa, Y., Yoshimi, M. & Amano, H., 2011, Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011. p. 141-147 7 p. 6131828. (Proceedings - 2011 2nd International Conference on Networking and Computing, ICNC 2011).

    研究成果: Conference contribution

    7 被引用数 (Scopus)
  • 2010

    Adaptive power gating for function units in a microprocessor

    Usami, K., Hashida, T., Koyama, S., Yamamoto, T., Ikebuchi, D., Amano, H., Namiki, M., Kondo, M. & Nakamura, H., 2010 5月 28, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. p. 29-37 9 p. 5450407. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

    研究成果: Conference contribution

    7 被引用数 (Scopus)
  • A datapath classification method for FPGA-based scientific application accelerator systems

    Ogawa, Y., Ooya, T., Osana, Y., Yoshimi, M., Nishikawa, Y., Funahashi, A., Hiroi, N., Amano, H., Shibata, Y. & Oguri, K., 2010, Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10. p. 441-444 4 p. 5681455. (Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10).

    研究成果: Conference contribution

  • A deadlock-free non-minimal fully adaptive routing using virtual cut-through switching

    Nishikawa, Y., Koibuchi, M., Matsutani, H. & Amano, H., 2010 10月 27, Proceedings - 2010 IEEE International Conference on Networking, Architecture and Storage, NAS 2010. p. 431-438 8 p. 5575700. (Proceedings - 2010 IEEE International Conference on Networking, Architecture and Storage, NAS 2010).

    研究成果: Conference contribution

    1 被引用数 (Scopus)
  • A low-power fault-tolerant noc using error correction and detection codes

    Kojima, Y., Matsutani, H., Koibuchi, M. & Amano, H., 2010 1月 1, Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010. Acta Press, p. 111-118 8 p. (Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010).

    研究成果: Conference contribution

  • A performance evaluation of CUBE: One-dimensional 512 FPGA cluster

    Yoshimi, M., Nishikawa, Y., Miki, M., Hiroyasu, T., Amano, H. & Mencer, O., 2010 4月 29, Reconfigurable Computing: Architectures, Tools and Applications - 6th International Symposium, ARC 2010, Proceedings. p. 372-381 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5992 LNCS).

    研究成果: Conference contribution

    6 被引用数 (Scopus)
  • A proposal of thread virtualization environment for cell broadband engine

    Yamada, M., Nishikawa, Y., Yoshimi, M. & Amano, H., 2010, Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2010. p. 32-39 8 p. (Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems).

    研究成果: Conference contribution

    2 被引用数 (Scopus)
  • A variable-pipeline on-chip router optimized to traffic pattern

    Hirata, Y., Matsutani, H., Koibuchi, M. & Amano, H., 2010, 3rd International Workshop on Network on Chip Architectures, NoCArc 2010, in Conjunction with the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-43. p. 57-62 6 p. (3rd International Workshop on Network on Chip Architectures, NoCArc 2010, in Conjunction with the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-43).

    研究成果: Conference contribution

    7 被引用数 (Scopus)
  • Geyser-1: A MIPS R3000 CPU core with fine-grained run-time power gating

    Ikebuchi, D., Seki, N., Kojima, Y., Kamata, M., Zhao, L., Amano, H., Shirai, T., Koyama, S., Hashida, T., Umahashi, Y., Masuda, H., Usami, K., Takeda, S., Nakamura, H., Namiki, M. & Kondo, M., 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 369-370 2 p. 5419857. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    研究成果: Conference contribution

    4 被引用数 (Scopus)
  • MuCCRA-3: A low power dynamically reconfigurable processor array

    Saito, Y., Sano, T., Kato, M., Tunbunheng, V., Yasuda, Y., Kimura, M. & Amano, H., 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 377-378 2 p. 5419853. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

    研究成果: Conference contribution

    5 被引用数 (Scopus)
  • Performance, cost, and power evaluations of on-chip network topologies in FPGAs

    In, S., Matsutani, H., Koibuchi, M., Wang, D. & Amano, H., 2010 7月 20, Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010. p. 181-189 9 p. (Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010).

    研究成果: Conference contribution